ArticleDirectory
- Ii. Storage
- 3. Peripherals
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I. Overview
The Blackfin DSP processor is a new type of 16 ~ The 32-bit embedded processor, based on the serial number architecture (MSA) jointly developed by ADI and Intel, accumulates a 32-bit RISC Instruction Set and double 16-bit multiplication (MAC) the signal processing function is combined with the usability of general-purpose microcontroller. The system structure of Blackfin DSP is not only suitable for Digital Signal Processing for video, image, audio, voice and data communication, but also provides comprehensive control capabilities.
Currently, the Blackfin series DSPs include bf535, bf531, bf532, and BF533. Among them, the bf535 interface is rich and has excellent performance, while the bf531/2/3 adds the video processing interface, which is very cost-effective. Due to its large usage, bf531 is currently cheaper in China and is easy to purchase. In addition, because bf531 supports plug-in SDRAM, it performs better in many large-capacity data processing applications. This article will focus on bf531 and gradually describe its features, resources and applications. Bf531 features:
The 16-Bit fixed-point DSP kernel enables MHz of continuous operation;
Up to MHz high-performance Blackfin processors: 2 16-bit Mac, 2 40-bit ALU, 4 8-bit video ALU, and 1 40-bit shift;
It has a simple programming, friendly compiling environment, advanced debugging, tracing, and performance monitoring;
Kernel voltage: VDD 0.8v ~ 1.2 V;
In-chip voltage regulator supports from 3.3v ~ V input voltage;
Flexible software control and dynamic power management;
160 pin mini-BGA Package; 169 pin PBGA package; 176 pin lqfp package.
Ii. Storage
The performance of the memory determines the efficiency of the entire CPU. Bf53x is integrated with a variety of configurable SRAM, which can be usedProgramAnd data cache, which makes up for the slow speed of reading and writing of SDRAM. The memory features of the bf53x series CPU are as follows:
4 GB uniform addressing space;
Up to 148kbytes in-chip memory: 16kbyters command SRAM/Cache 64kbyters command SRAM
32kbyters data SRAM/cache
32kbyters data SRAM
4kbyters stores the SRAM of the intermediate result
L1 data storage includes a 16 KB bank which can be configured as an SRAM or cache;
4 kb L1 temporary storage of SRAM, the access speed is the same as the L1 memory processor's fastest speed;
Two two-channel memory DMA controllers;
The memory management unit provides storage protection;
The memory controller can be seamlessly connected to dsram, SRAM, Flash, and Rom;
Flexible memory boot mode, which can be enabled from the SPI port or external memory.
3. PeripheralsBf531 is positioned as a digital signal processor (DSP), so its peripherals do not have a general CPU (such as the current popular arm. However, compared with general-purpose processors, it can only be said that each has its own length. Bf531 focuses more on processing audio and video streams. Of course, he also includes mainstream peripherals such as UART/SPI. Turn Off parallel peripherals interface (PPI)/gpio support ITU-R656 video data format:
Two dual-channel full-duplex synchronous serial interfaces (sport) support eight stereo I2S channels;
Direct Memory Access (DMA) between two storages );
8 peripheral DMA;
SPI compatible port;
Three Timer/counter, supports PWM;
Real-time clock and "watchdog" timer;
32-bit kernel timer;
16 gpio;
Supports IrDA UART.
For more information about the bf531 internal structure, see related documents.
Lqfp package bf531 is very convenient for everyone to use. Even two-layer circuit boards can also run very well.
Appendix:
Ms531 board pictures