High-speed can transceiver, can reach 1 mbaud
Can all enter the standby mode
Both have strong anti-interference capabilities
Both features hot shutdown (overheating protection)
When txd (Pin 1) is high, the output bus is in the implicit (recessive) state. When txd is low, the output bus is in the dominant (dominant) state.
Differential voltage VI (DIF) = VCANH-VVANL, when vi (DIF)> 0.9v, the bus is dominant; VI (DIF) <0.5v, the bus is recessive.
Pca82c133 complies with ISO 11898-24 standard, while tja1040 complies with ISO 11898 Standard
When the pca82c133 is passive, it does not affect the (not disturb) bus. When the tja1040 is passive, it can be regarded as disengages from bus, which is 0 load. In the passive state, tja1040 performs slightly better.
Pca82c133 has a slope control function (it is unclear what is a slope control self-check) to reduce electromagnetic radiation, and the pca82c133 Slope Control degree can be based on the access pin 8 (RS) the resistance value on is different. When the pca82c0000's pin 8 is directly grounded, there is no slope control function and it is in high-speed mode. We recommend that you use shielded cables to reduce electromagnetic radiation. If pin 8 of pca82c133 is grounded through resistance, slope control is enabled (see Figure 1 in red ). In this case, unshielded twisted pair wires or parallel lines can be used as cables. The greater the connected resistance value, the higher the slope control. The resistance value is generally greater than or equal to 10 KB. When the 8th-pin RS is directly grounded, the current iext between the RS and the ground is <500ua. When the RS is in Slope Control Mode, 10ua <iext <200ua, you can calculate the RExt resistance based on this range and the slope control you need.
Figure 1 Dynamic Characteristic Test Circuit Diagram
For the tja1040, the slope control is fixed, and the vendor balances the speed and electromagnetic radiation suppression. You cannot set the slope control level by yourself.
After the slope control, the 8th pin of the two interfaces is related to the slope control.
L for pca82c133, the 8th pin is named RS and the description is slope resistance input. When the RS is directly grounded, the transceiver is in high-speed mode, and the internal transistor is turned off and turned on as quickly as possible, this will cause large electromagnetic radiation. When the RS is grounded through resistance, the transceiver is in slope control mode, 3rd also details about this situation. When RS is powered on, the transceiver enters the standby mode.
L for tja1040, the 8th pin is named STB and described as the standby mode control input. Compared with pca82c133, we can see that the focus of the 8th pin functions of the two transceiver is different. The tja1040 has two modes: Normal Mode and standby mode. These two modes are controlled by the 8th pin. The transceiver is in normal mode when STB is connected to a low-power instance. When STB is connected to a high-power instance, the transceiver enters the standby mode.
Now that we have two transceiver 8th pins, let's talk about the differences inside the pins.
The tja1040 provides automatic fault protection (fail-safe features ). You can understand this functionality as tja1040 txd (1st pin) and STB (8th pin) have a pull-up function. Therefore, when the txd pin is not driven (unsupplied), it can ensure that the transceiver output to the bus is invisible; when the STB Is not driven (unsupplied), it can enable the transceiver to enter the standby mode.
This function is not available in pca82c133.
Tja1040 has txd explicit timeout protection, whereas pca82c133 does not.
What is txd explicit timeout protection? As mentioned above, when txd is low, the output bus status of the transceiver is dominant. Txd explicit time-out protection can prevent the transceiver from outputting the explicit state to the bus (this will block network communication). If the txd pin is low for a long time due to hardware or software errors, if the value of the internal timeout timer is greater than tdom, the transmitter of the transceiver is forbidden. When txd has a rising edge, the internal timeout timer is reset.
The key point here is what is the range of the internal timeout timer value tdom? This may be related to the baud rate that can be transmitted. Because a can packet can transmit up to 8 bytes of data at a time. If all the 8 bytes of data are 0, the time required to transmit these 8 bytes of all 0 is smaller than the minimum value of tdom. Otherwise, the transceiver will disable sending when judging the timeout.
The minimum internal timeout timer value of tja1040 is us, the maximum value is us, and the typical value is us. This data has no pressure on sending and receiving applications with a baud rate greater than or equal to 40 kbaud. However ..., You know.
The Electrostatic Protection Level of tja1040 is much better than that of pca82c133. In the human body mode, the tja1040 can withstand the static electricity protection-6 ~ 6kv; while pca82c133 is-2.5 ~ under the same conditions ~ 2.5kv.
In normal working mode, the difference between the two receivers is not big. In standby mode, the maximum consumption of tja1040 is 15ua, while that of pca82c0000is 275ua. The two are not an order of magnitude.
The output Differential voltage Vo (DIF) = vcanh-vvanl. The value of tja1040 is 1.5v ~ 3.0 V; pca82c133 is 1.0v ~ 5 V.
The 5th pins of the two transceiver are closely related to the typical circuit.
The 5th pin of pca82c0000is named vref and described as reference voltage output. That is, output a voltage value. The value range is 0.45vcc ~ in normal mode ~ 0.55vcc, usually do not use this pin. The typical application circuit is shown in Figure 2:
Figure 2 Typical pca82c133 Circuit
The 5th pin of the tja1040 is named split and described as: common-mode stabilization output ). It also outputs a voltage value. The typical value in normal mode is VCC, and the value is left blank in standby mode. This pin can help the secondary circuit to stabilize the recessive common mode voltage, so that the bus recessive voltage is stable at VCC, can differential waveform is improved, and eme is also improved. The typical application circuit is shown in figure 3:
Figure 3 typical tja1040 Circuit