Debug subsystem analysis of OpenRisc-29-ORPSoC

Introduction

As mentioned above, "If SOC is compared to a person," the debug subsystem is equivalent to a doctor who can detect the health of the body. This section briefly analyzes the debug subsystem of orpsoc.

The debug system serves as two main tasks. In addition to debugging, it is also responsible for programming Flash.

1. subsystem structure

2. Structure Description

The entire debug system can be simply divided into two parts: the upper part and the lower part. The upper and lower parts communicate through the JTAG protocol.

1> previous section

The upper part includes PC and ftdi.

Ftdi is a 4in1 chip, two of which are the JTAG interface (FPGA, orpsoc, JTAG), and the other two are UART,

Or32-debug_proxy is the driver of ftdi, SVN can be used in the opencores official website SVN Server Download, the svn directory structure is as follows:

Note that the trunk directory contains a large amount of content. You can download the corresponding sub-directories as needed:

You can use SVN to enter the corresponding checkout path to download the corresponding resource:

2> next section

The lower part is the orpsoc module in FPGA. Through the internal custom protocol, the system status information is obtained by reading SPRS (special function register) based on the preceding JTAG commands, return to the above part, and finally to the or32-elf-gdb (or1200 platform GDB), print out in the terminal, complete the debugging work.

 

For more information about the chip pins and module port names, see:

Http://blog.csdn.net/rill_zhen/article/details/9044791

3. Download the program

To enable orpsoc to run software, at least two parts should be done. First, the hardware logic of orpsoc should be burned to FPGA. Second, the software should be written to the flash of orpsoc.

1> do not explain the first step. 2> the second step is described.

1. Using FPGA tools to operate orpsoc's altserial_flash_loader module. This is Altera's LPM. What is the role of this module?

The manual is described as follows:

Serial flash loader megafunction. The altserial_flash_loader is a bridge that allows Programming Data to cross from the JTAG interface via the FPGA to the active serial interface.

2. altserial_flash_loader saves the data (software program) sent from the FPGA tool and is controlled by the simple_spi module of orpsoc and transferred to the arbiter_bytebus module. The arbiter_bytebus module is a slave device (S3) of arbiter_.pdf ), the master of arbiter_dbus is the data interface of or1200_top. Commands in bootrom can read SPI Flash content to SDRAM and then start the system.

For the orpsoc startup process, see:

Http://blog.csdn.net/rill_zhen/article/details/8855743

3> Summary

Since then, we have made clear the process of starting orpsoc bootloader (orpmon.

1. The FPGA tool writes orpmon to altserial_flash_loader.

2. Hardware solidification of the startup code in bootrom.

3. Power on bootrom commands

4 bootrom command reads altserial_flash_loader to SDRAM and runs it.

5. Load Linux and Applications

6. The system building is displayed in front of us.

7. The overall data path is as follows,

RED: Initialize in advance.

Yellow: bootrom running.

Green: oprmon code reading.

Blue: oromon write memory.

4. Summary

This section briefly introduces the structure of orpsoc's debug system and the data path of the debugging process.

If you encounter problems during debugging, you can perform analysis and troubleshooting in stages to solve the problem.