Design Analysis of Four-board

First, Second, Third
Layer1 signal Gnd
Layer2 Gnd/PWR signal/PWR Signal
Layer3 PWR/Gnd signal/PWR Signal
Layer4 signal Gnd PWR
The recommended solution is the first two.
Solution 1: It is usually used when there are many chips on the board. This solution provides better signal integrity, which is not very good for electromagnetic compatibility. Note: The formation layer is placed in the connection layer of the signal layer with the highest signal density. Increasing the area of the plate helps to absorb and suppress radiation.
Solution 2: it is usually used in scenarios where the chip density on the board is low enough and there is enough area around the chip (placed on the required power supply copper coating. The power supply on the signal layer is laid out with a wide line, which reduces the path impedance of the power supply current while shielding the inner layer signal radiation through the outer layer. Note that the gap between the two signals in the middle and the power supply mixing layer should be opened, and the line direction should be vertical to avoid crosstalk. However, the signal lines are all in the same layer, causing inconvenience during debugging.

For the third case, let's talk about its advantages and disadvantages.
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My opinion-gdtyy
The first solution can be used. A typical microline model with low latency (NS/inch) on the signal surface and unit distance (fast, the disadvantage is that the surface dielectric constant is significantly affected by changes in external temperature, humidity, and air, and the products are not stable. Using these devices at different locations on the earth may result in great performance differences, your maintenance costs will increase accordingly. Both the power supply layer and formation have a restraining effect on interference, but the formation effect is better. Increasing the area of the board may absorb more noise and emit more interference to the outside, and the cost is high. It is suitable for use and does not need to pursue a large area. This solution has nothing to do with a small number of chips on the board. Because there is an electric formation next to the signal layer, and the noise has a shortest path, the noise resistance is very good. In addition, there is an electrical isolation, and the two-layer signal line direction does not have to be vertical, love how to go, a word, cool.

The second solution is extremely bad. It splits the power supply layer, wastes a wiring plane, and increases interference between signal layers. Because the power supply layer is almost equivalent to the ground layer in anti-noise, and the thicker the power cord, the better, so the power supply layer should be complete first. The formation on the surface of the Board minimizes internal and external interference, but you ignore the interference between signal layers without electrical formation isolation. A thick glass fiber substrate is formed between two layers of signals, and Fr4 material and electrical strata are built on the outside. They are neither a microline nor a cable, and cannot be simply analyzed. A simulation method must be used, and the results are not necessarily in line with the actual situation (it is difficult to build a mathematical model). Why!
The signal line goes through the inner layer and can be easily debugged by adding a test hole. This overlapping structure creates elbows everywhere. Is the layer spacing large and costly? Thickness? What should I do? The signal lines of different layers are vertical and the constraints are too large. Not only do we need to be orthogonal, but also avoid the AC loop (deltfai = deltb * delts). It is annoying to walk.

The third solution is not good either. It is a little better than the second solution, for the same reason. If your simulation capabilities are strong, use them boldly. However, you must note that the formation area must be greater than the power supply layer area, commonly known as "day-to-day". Only in this way can most of the electromagnetic energy be absorbed inside the electric formation. If the area is equal, there will be a great deal of electromagnetic leakage at the edge of the electric ground. (How much is the formation larger than the power supply layer?

The fourth solution is S1/PWR/s2/Gnd, S1 is a microline, S2 is similar to a half line (with an annoying substrate separated), and some are nondescribable because the transmission line model is not strictly observed, poor impedance matching.

In summary, only the first of the four layers is the best layout scheme.

In addition, you seem to be keen on the formation shielding. In fact, not only does it have the shielding function, but the power supply layer also has the anti-noise capability, you can think of the formation and power supply layer as a concept (from the anti-noise point of view). It is called an electric formation, and it is much easier to distinguish the two.