Design and Implementation of Network Interface Based on ARM-LPC2368

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Abstract: This paper takes the microprocessor lpc2368 as the core and dp83848c as the Ethernet physical layer interface chip, and introduces in detail the implementation of the embedded Ethernet interface. First, we briefly introduce the microprocessor lpc2368 and the Physical Layer Chip dp83848c, then provide the hardware design based on the Ethernet interface of the lpc2368, and finally briefly describe the software implementation process.
Key words: embedded system, Ethernet, lpc2368, dp83848c

1 Introduction

With the rapid development of Internet technology, people's requirements for information sharing are also constantly increasing. At present, the embedded system has penetrated into every corner of our lives. Its perfect combination with the network provides great convenience for us to share information. Philips's lpc2368 is an excellent microprocessor. If its embedded system does not have an Ethernet interface, its application value will be greatly reduced. Therefore, for the entire system, the Ethernet interface circuit should be indispensable, but it is also relatively complicated.

The Ethernet interface circuit consists of the Mac controller and the physical layer interface (physical layer, phy. The lpc2368 is embedded with an Ethernet controller that supports streamlined media independent interfaces (rmii) and buffered DMA interfaces (BDI ), ethernet Access of 10 Mbit/s/Mbit/s is available in half duplex and full duplex modes. Therefore, the lpc2368 actually includes Ethernet MAC control, but does not provide physical layer interfaces.External Physical Layer ChipTo provide an Ethernet access channel. The dp83848c of National semiconduis selected as the Ethernet physical layer interface chip. It provides interfaces including MII, rmii, and SNI, which can be easily connected to the lpc2368.

2Lpc2368AndDp83848cIntroduction

2.1 microprocessor lpc2368

The lpc2368 is a 32-bit microcontroller based on the ARM7TDMI-S kernel that operates at a frequency of up to 72 MHz. It is powerful and cost-efficient and supports 10/100 Ethernet, full speed (12 Mbps)USB2.0 and can 2.0b; with up to KB of In-chip Flash, 58kb of SRAM, 10-bit A/D and D/A converter and an IRC oscillator, you can also choose from an SD memory card interface in a 100-pin lqfp package (14x14x1.4 ). It is widely used in industrial control, POS system, protocol conversion, encryption system, and other fields [1].

2.2 Physical Layer Chip dp83848c

Dp83848c is a 10/100 Mbit/s single-ended low-power physical layer device. It has several smart power consumption modes, including 25 MHz clock output, which can easily be connected through external transformer and twisted pair wire media interfaces; two IEEE 802.3u MII and rmii rev 1.2 protocols are supported for easy design. The integrated sub-layer supports 10base-t and 100base-tx Ethernet protocols, and low power consumption is less than 270 mW and 3.3 V Mac interfaces; configurable SNI interface; 48-pin lqfp encapsulation (7x7mm ). As an Ethernet physical layer transceiver, dp83848c is widely used in high-end peripheral devices, industrial control and factory automation, and general embedded applications [2].

3Hardware Design

3.1 circuit diagram

The connection between the lpc2368 and dp83848c is simple. You can directly connect to the dp83848c through the rmii interface. After the connection, dp83848c connects the transmission media through the network isolation transformer and RJ45 interface, as shown in Circuit Diagram 1.

Figure 1 Ethernet interface circuit diagram of microcontroller lpc2368 and PHY chip dp83848c

3.2 schematic design of the Ethernet Interface Circuit

Dp83848c supports several Mac interface methods: (1) MII; (2) rmii (reduced MII); (3) 10 MB serial Network Interface (SNI ). Here we useRmiiInterface mode, which is determined by setting pin pin39 and pin6, as shown in table 1.

Table1:MIIMethod Selection

Mii_mode (pin39) sni_mode (pin6) Mac interface mode

0 0 or 1 MII Mode

1 0 rmii Mode

1 1 10 mb sni Mode

From table 1, we can see that pin39 should be connected to a high level, and pin6 should be connected to a low level. At the same time, because the default value is 0 in the pin6 drop-down in the chip, you only need to setPin39 connected to high levelIn this way, the microprocessor lpc2368 can be connected with the PHY chip dp83848c through the rmii interface. They are connected through the rmii interface. The number of pins used for Chip and controller connections is relatively small, and the data transmission rate is two bits each time, that is, the frequency is 50 MHz, therefore, a 50 MHz crystal oscillator is required to connect to the pin34 X1 pin.

In rmii mode, the main pins used are:

1. Serial management: MDC (pin31) and mdio (pin30 );

2mac data: tx_en (pin2), txd [1:0] (pin4 pin3), rx_er (pin41), crs_dv (pin40), rxd [1:0] (pin44 pin43 );

3 clock: x1 (pin34, rmii reference clock is 50 MHz), X2 (pin33 ).

The high position of pin27 enables dp83848c to work at a rate of Mbps,LEDDisplays the running status of dp83848c. 16st8515 is a network isolation transformer, mainly used for signal transmission, impedance matching, waveform repair, clutter suppression, and high voltage isolation to protect system security. Use Protel 99 SE to draw the circuit schematic 2.

Figure 2 schematic diagram of the Ethernet Interface Circuit

4Software Implementation Process

The software has three main parts: system initialization, data transmission and receiving.

The initialization part completes the initialization before the Ethernet interface is used, including setting related registers, allocating and initializing the sending and receiving buffers.

4.1 Working Principle of Ethernet

The packets corresponding to the network interface layer are in the complete Ethernet frame format. Therefore, to send and receive data, you must follow the Ethernet protocol, the frame structure defined by the Protocol is shown in table 2.

Table2: Standard Ethernet frame format

Synchronization bit separation bit Destination Address Source Address frame type data segment fill check bit

56bit 8bit 48bit 48bit 16bit <1500 byte optional 32bit

Each Nic has a fixed global physical address (MAC address) when it leaves the factory ). When a node on the bus sends a data frame, other network nodes on the bus copy the data frame. Each node checks the destination physical address of the data frame. If it matches its own physical address, the NIC of the node accepts the data frame and transmits it to the upper-layer protocol for processing. Otherwise, the node discards the data frame.

4.2 send and receive data frames

Data is sent and received in an interrupted manner.

Send data frame: encapsulate the data to be sent into an Ethernet frame and write it into the sending buffer. Check whether data is being transmitted in the network, that is, whether the last frame has been sent, if data is still being transmitted in the network, frames cannot be sent for the time being. If there is no data in the network, this frame can be sent immediately. When this frame is sent, the next data frame can be encapsulated at the same time, and write it into the second sending buffer; when the service is interruptedProgramWhen the first data frame is detected, the next data frame can be sent. Repeat the preceding process until all data frames are sent. Figure 3 shows the flowchart for sending data frames.

Receive data frame: wait until a data frame arrives. Save the data frame to the FIFO cache and check the destination address of the data frame. If it is the nic mac address or broadcast address, if no error is detected, the data is transmitted to the receiving buffer and interrupted to the processor. the received data frame is continuously read from the NIC local cache to the system memory. Figure 4 shows the flowchart for receiving data frames.

Figure 3 transmission data frame Flowchart

Figure 4 receiving data frame Flowchart

5Conclusion

This article describes how to design Ethernet interfaces by using the microprocessor lpc2368 and PHY chip dp83848c. Due to the excellent performance of the microcontroller lpc2368 and the Physical Layer Chip dp83848c, this interface circuit has many advantages, such as simple structure, small size, and low power consumption. It is a good choice for realizing the connection between embedded systems and networks.

Innovation point of this article: using the powerful microprocessor lpc2368 to connect to the physical layer chip through a streamlined independent media interface, to make cabling easier while ensuring the same function, this greatly reduces the error rate during design.

References

[1]. Maid/6/8/78 user manual.

[2]. dp83848c user manual.

[3].ArmMicrocontroller basics and practices [M]. Beijing: Beijing University of Aeronautics and Astronautics Press, 2005.

[4]. fu Chong, Chen Ying, Ma ximin, and Zhang Yongyuan. design and Implementation of an Ethernet interface for a General Embedded System [J]. journal of Shandong University, 2005.6, 35 (3): 93-97.

[5]. lv Changtai, Luo Yonggang. Research and Design of Embedded Ethernet interface [J]. Microcomputer Information. 22 (8-2): 68-70.

[6]. ge Yongming, Lin jibao. Design of Ethernet interface of embedded system [J]. Application of Electronic Technology., 3: 25-27.

[7]. Microcomputer Information-embedded and SOC (mid-term)