Detailed description of U-boot startup code start. S-Supplement

U-BOOT
1. directory structure of U-BOOT
The U-boot directory contains 18 sub-directories, which respectively store unmanageable source programs. The files to be stored in these directories have their own rules and can be divided into three types.
& #65517; the first category of directory is directly related to the processor architecture or development board hardware;
& #65517; the second class directory contains some common functions or drivers;
& #65517; the third category is u-boot applications, tools, or documents.
Board: and some existing Development Board related files, such as makefile and u-boot.lds and specific development board hardware and address allocation.
Common: A file unrelated to the architecture. It is a C file that implements various commands.
CPU: CPU-related files. Sub-directories in these files are named as CPUs supported by U-boot, such as arm926ejs, MIPS, mpc8260, and NIOS. Each specific sub-directory contains the CPU. C and interrupt. C and start. s. CPU. c. initialize the CPU, set the command cache and data cache, and interrupt. c. set various terminals and exceptions of the system, such as fast interruption, switch interruption, clock interruption, software interruption, prefetch suspension, and undefined commands; start. S is the first file executed during U-boot startup. It mainly sets the system stack and the working style to lay the foundation for entering the C program.
Disk: The partition processing code of the disk driver,
DOC: document.
Drivers: general-purpose device drivers, such as various NICs, flash supporting CFI, serial ports, and USB bus.
DTT: the drive of a Digital Thermostat or sensor
Examples: Examples of independent applications.
FS: file systems are supported. U-boot now supports cramfs, fat, fdos, jffs2, yaffs, and registerfs.
Include: the header file, as well as file changes supported by various hardware platforms, system configuration files, and files supported by the file system.
Net: Network-related code, BOOTP protocol, TFTP protocol RARP protocol, and NFS file system implementation.
Lib_ppc: stores files that are common to the PowerPC architecture. It is mainly used to implement functions and Code related to the PowerPC architecture.
Lib_i386: stores files common to the X86 architecture. It is mainly used to implement functions common to the X86 platform and Code related to the PowerPC architecture.
Lib_arm: stores files that are common to the ARM architecture. It is mainly used to implement common functions of the ARM platform and Code related to the ARM architecture.
Lib_generic: universal function implementation.
Post: power-on self-check.
RTC: Real-time clock driver.
Tools: tools for creating S-record format files and U-BOOT images.
Ii. U-boot Compilation
The source code of U-boot is compiled by using GCC and makefile. The makefile in the top-level directory can first set the definition of the board, and then call makefile in directories of different levels recursively, finally, link the compiled program to the U-boot image.
Makefile in the top-level Directory, which is responsible for compiling the overall U-boot configuration. Each Development Board must have a board configuration definition in makefile. For example, smdk2442 is defined as follows:
Smdk2442_config: unconfig
@./Mkconfig $ (@: _ Config =) arm ARM920T smdk2442
Run the "make smdk2442_config" command to configure U-boot and generate the configuration file include/config. mk through the./mkconfig script. The file content is generated based on the makefile configuration for the board.
The configuration environment and compilation process are described as follows. The compilation environment configuration of U-boot requires cross-2.95.3.tar.bz2and s3c24x0_uboot_rel_0_0_2017061002.tar.bz2 to copy the file to/home/amoi/working ,(
[Email = amoi @ chenpx:/mnt/HGFS/share $] chenpx @ chenpx:/mnt/HGFS/share $ [/Email]
Cross-2.95.3.tar.bz2/home/amoi/working
And
[Email = amoi @ chenpx:/mnt/HGFS/share $] chenpx @ chenpx:/mnt/HGFS/share $ [/Email]
CP s3c-u-boot-1.1.6.tar.bz2/home/amoi/working ),
Decompress the file (
[Email = amoi @ chenpx:/home/amoi/working $] chenpx @ chenpx:/home/chenpx/working $ [/Email]
Tar jxvf cross-2.95.3.tar.bz2 and
[Email = amoi @ chenpx:/home/amoi/working $] chenpx @ chenpx:/home/chenpx/working $ [/Email]
Tar jxvf s3c24x0_uboot_rel_0_1_061002.tar.bz2 ), create an arm folder in the/usr/local/directory (mkdir-P/usr/local/ARM (-P folder decompressed to/usr/local/ARM /) 2.95.3/usr/local/ARM /)
Add the environment variable export Path = $ path:/usr/local/2.95.3/bin/

Modify the makefile in s3c24x0_uboot_dev and comment out cross_compile =/usr/local/ARM/2.95.3/bin/ARM-Linux-others.

Next, load the Configuration:
Finally compile: Make, finally in the s3c24x0_uboot-dev directory to generate U-boot, u-boot.bin, u-boot.map, 2 u-boot.srec four files.
Iii. U-boot system startup process
Most bootloaders are divided into stage1 and stage2, and U-boot is no exception. Code dependent on the CPU architecture (such as device initialization Code) is usually stored in stage1 and can be implemented in assembly language, while stage2 is implemented in common C language, in this way, you can implement complex functions and have better readability and portability.
1. stage1 start. s code structure
The stage1 code of U-boot is usually stored in the start. s file, which is written in assembly language. The main code is as follows:
(1) define the entry. An executable image must have one entry point and only one global entry. Generally, this entry is placed at 0x0 address of the RoM (flash). Therefore, the compiler must be notified to know the entry, which can be done by modifying the connector script.
(2) set the exception vector ).
(3) set the CPU speed, clock frequency, and terminal control register.
(4) initialize the memory controller.
(5) copy the program in the Rom to ram.
(6) initialize the stack.
(7) Go to ram for execution. This task can be completed using the ldr pc command.
2. stage2 C Code Section
Lib_arm/board. in C, start arm boot is a function starting from C language and the main function of C language in the whole startup code. It is also the main function of the whole U-boot (armboot). You only need to complete the following operations:
(1) call a series of initialization functions.
(2) initialize the flash device.
(3) initialize the system memory allocation function.
(4) If the target system has a NAND device, initialize the NAND device.
(5) If the target system has a display device, initialize the device.
(6) initialize related network devices, and fill in IP addresses and MAC addresses.
(7) enter the command loop (that is, the operating cycle of the entire boot), accept the commands input by the user from the serial port, and then perform the corresponding work.
3. boot sequence of U-boot
Shows the main sequence.

Function order initialization sequence
The figure shows the U-boot sequence.
The following is an explanation based on the Code:
************** *********/
. Globl _ start // U-boot startup entry
_ Start: B reset // Reset vector and jump to reset
Ldr pc, _ undefined_instruction
Ldr pc, _ software_interrupt
Ldr pc, _ prefetch_abort
Ldr pc, _ data_abort
Ldr pc, _ not_used
Ldr pc, _ IRQ // interrupt vector
Ldr pc, _ FIQ // interrupt vector
B sleep_setting // jump to sleep_setting
And copy the code to the memory
Relocate: // re-locate uboot to ram
ADR r0, _ start // R0 is the current position of the Code
LDR R2, _ armboot_start // R2 is the starting address of armboot.
LDR R3, _ armboot_end // R3 is the end address of armboot.
Sub R2, R3, R2 // R2 get the armboot size
LDR R1, _ text_base // R1 get the target address
Add R2, R0, R2 // R2 get the source end address
Copy_loop: // locate the code
Ldmia R0 !, {R3-r10} // replicate from Source Address [R0]
Stmia R1 !, {R3-r10} // copy to Destination Address [R1]
CMP r0, R2 // copy the data block until the end address of the source data [R2]
Ble copy_loop
After the system is powered on or reset, the cpu pc generally points to the 0x0 address. The command on the 0x0 address is
Reset: // reset startup subroutine
/******** Set the CPU to svc32 mode ***********/
Mrs r0, CPSR // read and save the CPSR Status Register to R0.
Bic r0, R0, # 0x1f
ORR r0, R0, #0xd3
Msr cpsr, R0
// Write R0 to the Status Register
******************/
LDR r0, = pwtcon
MoV R1, #0x0
STR R1, [R0]
*****************/
MoV R1, #0 xffffffff
LDR r0, = intmsk
STR R1, [R0]
LDR R2, = 0x7ff
LDR r0, = intsubmsk
STR R2, [R0]
/************** Initialize the system clock *****************/
LDR r0, = locktime
LDR R1, = 0 xffffff
STR R1, [R0]
Clear_bss:
LDR r0, _ bss_start // locate the start address of BSS
Add r0, R0, #4 // start with the first word of BSS
LDR R1, _ bss_end // end address of BSS
MoV R2, #0x00000000 // Reset
Clbss_l: Str R2, [R0] // address clearing cycle in the BSS segment
Add r0, R0, #4
CMP r0, r1
BNE clbss_l
/**************** Key initialization subprograms ****************** ******/
/* CPU initialization key registers
* Set important registers
* Set the memory clock.
*/
Cpu_init_crit:
/** Flush V4 I/D caches */
MoV r0, #0
MCR P15, 0, R0, C7, C7, 0/* flush V3/v4 cache */
MCR P15, 0, R0, C8, C7, 0/* flush V4 TLB */
/************ Disable MMU stuff and caches ****************/
MRC P15, 0, R0, C1, C0, 0
Bic r0, R0, #0x00002300 @ clear bits 13, 9: 8 (-- V--- RS)
Bic r0, R0, #0x00000087 @ clear bits 7, 2: 0 (B ----cam)
ORR r0, R0, #0x00000002 @ set bit 2 (a) Align
ORR r0, R0, #0x00001000 @ set bit 12 (I) I-Cache
MCR P15, 0, R0, C1, C0, 0
/****** Before locating again, we need to set the ram time. Because the memory clock depends on the hardware of the Development Board, you will find memsetup. s under the board directory. **************/
MoV IP, LR
# Ifndef config_s3c2440a_jtag_boot
BL memsetup // call the memsetup subroutine (on the board/smdk2442memsetup. s)
# Endif
MoV LR, IP
MoV PC, LR // subroutine return

Memsetup:
/**************** Initialize the memory **************/
MoV R1, # mem_ctl_base
Adrl R2, mem_1__val
Add R3, R1, #52
1: LDR R4, [R2], #4
STR R4, [R1], #4
CMP R1, r3
BNE 1b
/*********** Jump to the next command (start. s file )***************/
MoV PC, LR // subroutine return
/****************** Create a stack *******************/
LDR r0, _ armboot_end // armboot_end relocation
Add r0, R0, # config_stacksize // configure stack space downward
Sub sp, R0, #12 // reserved 3 words for abort-Stack
/*************** Jump to C code **************/
Ldr pc, _ start_armboot // jump to the start_armboot function entry, start_armboot
Function entry pointer for saving words
_ Start_armboot:. Word start_armboot // The start_armboot function is implemented in lib_arm/board. C.
The second stage of C code
*******************/
. Align 5
Undefined_instruction: // undefined command
Get_bad_stack
Bad_save_user_regs
BL do_undefined_instruction
. Align 5
Software_interrupt: // software interruption
Get_bad_stack
Bad_save_user_regs
BL do_software_interrupt
. Align 5
Prefetch_abort: // prefetch exception aborted
Get_bad_stack
Bad_save_user_regs
BL do_prefetch_abort
. Align 5
Data_abort: // Data Exception aborted
Get_bad_stack
Bad_save_user_regs
BL do_data_abort
. Align 5
Not_used: // unused
Get_bad_stack
Bad_save_user_regs
BL do_not_used
. Align 5
IRQ: // interrupt the request
Get_irq_stack
Irq_save_user_regs
BL do_irq
Irq_restore_user_regs
. Align 5
FIQ: // fast request interruption
Get_fiq_stack
/* Someone ought to write a more effiction fiq_save_user_regs */
Irq_save_user_regs
BL do_fiq
Irq_restore_user_regs
Sleep_setting: // sleep setting
@ Prepare the SDRAM self-Refresh Mode
LDR r0, = 0x48000024 @ refresh register
LDR R1, [R0]
ORR R1, R1, # (1bd = & bd_data;
Memset (Gd-> BD, 0, sizeof (bd_t ));
Monitor_flash_len = _ armboot_end_data-_ armboot_start;
/*** Call and execute the init_sequence array to execute initialization in order ***/
For (init_fnc_ptr = init_sequence; * init_fnc_ptr; ++ init_fnc_ptr ){
If (* init_fnc_ptr )()! = 0 ){
Hang ();
}
}
# If 0
/*************** Configure available flash units *************/
Size = flash_init (); // initialize flash
Display_flash_config (size); // display the flash size
/******** _ Arm_boot is defined in the armboot. LDS link script ********/
# Endif
# Ifdef config_vfd
# Ifndef page_size
# Define page_size 4096
# Endif
/*********** Display reserved memory for VFD (entire page )**********/
/******* Armboot_real_end define ********/
ADDR = (_ armboot_real_end + (page_size-1 ))&~ (Page_size-1 );
Size = vfd_setmem (ADDR );
GD-> fb_base = ADDR;
/******* Enter the next interface ********/
ADDR + = size;
ADDR = (ADDR + (page_size-1 ))&~ (Page_size-1 );
Mem_malloc_init (ADDR );
# Else
/******* Armboot_real_end define *******/
Mem_malloc_init (_ armboot_real_end );
# Endif/* config_vfd */
# If (config_commands & cmd_cmd_nand)
Puts ("NAND :");
Nand_init ();/* NAND initialization */
# Endif
# Ifdef config_has_dataflash
At91f_dataflashinit ();
Dataflash_print_info ();
# Endif
/********* Initialize the environment **********/
Env_relocate ();
/*********** Configure the environment variables and reposition **********/
# Ifdef config_vfd
/* Must do this after the framebuffer is allocated */
Drv_vfd_init ();
# Endif
/* Obtain the IP address from the Environment */
Bd_data.bi_ip_addr = getenv_ipaddr ("ipaddr ");
/* MAC address of the Ethernet interface */
{
Int I;
Ulong reg;
Char * s, * E;
Uchar TMP [64];
I = getenv_r ("ethaddr", TMP, sizeof (TMP ));
S = (I> 0 )? TMP: NULL;
For (REG = 0; Reg BD-> bi_enetaddr );
# Endif
# Ifdef config_driver_lan91c96
If (getenv ("ethaddr ")){
Smc_set_mac_addr (Gd-> BD-> bi_enetaddr );
}
/* Eth_hw_init ();*/
# Endif/* config_driver_lan91c96 */
/* Initialize through environment variables */
If (S = getenv ("loadaddr "))! = NULL ){
Load_addr = simple_strtoul (S, null, 16 );
}
# If (config_commands & cmd_cmd_net)
If (S = getenv ("bootfile "))! = NULL ){
Copy_filename (bootfile, S, sizeof (bootfile ));
}
# Endif/* cmd_cmd_net */
# Ifdef board_post_init
Board_post_init ();
# Endif
/* Main_loop () always tries to start automatically, and the loop is continuously executed */
For (;;){
Main_loop ();/* main cyclic function processing execution USER command-Common/Main. c
}
/* Notreached-No Way Out of command loop handle T booting */
}