Differences between von noriman's architecture, Harvard's architecture and improved Harvard Structure

1. Von noriman Structure
The noriman structure is also called the princetionarchitecture ).
In 1945, Feng nuoman first proposed the concept of "Storage program" and the binary principle. Later, people referred to the electronic computer system designed using this concept and principle as the "Feng nuoman-type structure" computer. The processor of the Von noriman structure uses the same memory for transmission over the same bus.
The von noriman structure processor has the following features:
There must be a memory;
There must be a controller;
There must be an iterator for completing arithmetic and logical operations;
There must be input and output devices for human-computer communication.
The main contribution of von noriman is to propose and implement the concept of "Storage program. Since commands and data are both binary codes, and the address of commands and operands are closely related, it is natural to select this structure. However, this command and data share the same bus structure, making the transfer of information flow a bottleneck restricting computer performance, affecting the speed of data processing.
In typical cases, it takes three steps to complete an instruction, namely, obtaining the instruction, decoding the instruction, and executing the instruction. From the regular relationship of the instruction stream, we can also see the difference between the Pattern Processing Method of the Von noriman structure and the Harvard structure. For example, the simplest command for read/write operations on the memory. commands 1 to 3 are memory and Data fetch commands. For the Von noriman structure processor, since commands and data to be accessed must be accessed from the same bucket and transmitted through the same bus, they cannot be overlapped and executed. Only one bucket can be accessed before the next one.
There are many CPUs in the ARM7TDMI series, some of which do not have internal cache. For example, ARM7TDMI is a pure von noriman structure, other CPUs with internal cache and separated Data from instruction cache use the haver structure.

2. Harvard Structure
The Harvard structure is a memory structure that separates program instruction storage from data storage, as shown in 1. The central processor first reads the content of the program instruction in the program instruction memory, decodes the content, obtains the data address, reads the data in the corresponding data storage, and performs the next operation (usually execution ). The program instruction storage and data storage are separated, which can make the instruction and data have different data widths. For example, the program instruction of the pic16 chip of microchip is 14-Bit Width, while the data is 8-bit width.

Figure 1 Harvard architecture Diagram

The Harvard structure microprocessor usually has a high execution efficiency. The program commands and data commands are organized and stored separately. The next command can be read in advance during execution.
At present, there are a lot of central processors and controllers that use the Harvard structure, except for the PIC chips of the microchip company, there are also Motorola's mc68 series, zilog's Z8 series, Atmel's AVR series, and arm's ARM9. arm10 and arm11.
The Harvard structure refers to an independent architecture of programs and data spaces. It aims to reduce the memory access bottleneck during program running.
For example, in the most common convolution operation, a command takes two operands at the same time. During pipeline processing, there is also a finger fetch operation. If the program and data are accessed through a bus, the fetch and fetch operations must conflict with each other, which is detrimental to the execution efficiency of a large number of cycles.
The Harvard structure can basically solve the conflict between the fetch and the fetch.
The access to another operand can only adopt the enhanced Harvard structure. For example, the data zone is split like Ti, and a group of bus is added. Or use command cache like ad, and the command area can store part of the data.
In typical cases, it takes three steps to complete an instruction, namely, obtaining the instruction, decoding the instruction, and executing the instruction. From the regular relationship of the instruction stream, we can also see the difference between the Pattern Processing Method of the Von noriman structure and the Harvard structure. For example, the simplest command for read/write operations on the memory. commands 1 to 3 are memory and Data fetch commands. For the Von noriman structure processor, since commands and data to be accessed must be accessed from the same bucket and transmitted through the same bus, they cannot be overlapped and executed. Only one bucket can be accessed before the next one.
If the Harvard structure is used to process the preceding three access data commands, the commands can be executed in overlapping mode because the commands and access data are transmitted through different buckets and different bus, this overcomes the bottleneck of data stream transmission and increases the computing speed.

3. Differences between the Von noriman System and the Harvard Bus System
The difference between the two is whether the program space and the data space are integrated. The data space of the Von noriman structure is not separated from the address space. The data space of the Harvard structure is separated from the address space.
In the early days, most of the micro-processors were constructed by von noriman, typically Intel's X86 micro-processor. The read-only and read-only operations are performed on the same bus in a time-based manner. The disadvantage is that in high-speed operation, commands and operands can not be obtained at the same time, thus forming a bottleneck in the transmission process.
The Application of Harvard bus technology is represented by DSP and arm. The internal program space and data space of the chip adopting the Harvard bus architecture are separated, which allows both the finger and the operand to be taken, thus greatly improving the computing capability.
The DSP chip hardware structure consists of the Von noriman structure and the Harvard structure. The difference between the two is whether the address space and the data space are separated or not. Generally, DSP adopts an improved Harvard structure, that is, the separated Data Space and address space are not only one, but multiple, which varies with the DSP chips of different manufacturers. In terms of external addressing, the logic is also the same. Because of the external pins, it is generally implemented through the corresponding space selection. It is essentially the same.

 

4. Improved Harvard structure and Harvard Architecture

Compared with von Norm's structure processor, Harvard's structure processor has two notable features:
(1) Two Independent memory modules are used to store commands and data respectively. Each storage module does not allow the coexistence of commands and data;
(2). Two Independent bus are used as the dedicated communication path between the CPU and each memory, and there is no association between the two bus.

Later, I proposedThe improved Harvard structure has the following structural features:
(1 ).Two independent storage modules are used to store commands and data respectively. commands and data cannot coexist in each storage module;
(2 ).With an independent address bus and an independent data bus, the public address bus is used to access two storage modules (program storage module and data storage module ), the Public Data Bus is used to transmit data between the program storage module or data storage module and the CPU;
(3 ).The two buses are shared by the program memory and data storage at time.

 

5. Summary

The architecture is independent of the bus used, and is related to the separation of the Command Space and data space.. 51 Single-Chip Microcomputer although the data instruction storage area is separate, but the bus is time-sharing, so it belongsImproved Harvard Structure. Although arm9-is a Harvard structure, the previous version (such as ARM7) is still a Von noriman structure. One important reason why early x86 could quickly occupy the market was that it relied on the simple and low-cost bus structure of von noriman. Although the current processor's external bus looks like the noriman structure, the internal cache actually looks like an improved Harvard structure. As for the advantages and disadvantages, the Harvard structure is complex and requires high connection and processing requirements for peripheral devices. It is not suitable for the expansion of Peripheral memory. Therefore, it is difficult for general-purpose CPUs to adopt this structure in the early days. The microcontroller, because the internal integration of the required memory, so the use of Harvard structure is not a taste. The current processor, relying on the existence of cache, has well integrated the two.