Experience in PCB layout

For {
Tagshow (Event)
} "> For electronic products, printed circuit boards {
Tagshow (Event)
} "> The design is its slave power {
Tagshow (Event)
} "> The schematic diagram becomes a Necessary design process for a specific product. Its design rationality is closely related to product production and product quality. For many people who are just engaged in electronic design, little experience in this area, although you have learned the design of printed circuit board {
Tagshow (Event)
} "> Software, but the design of printed circuit boards often has such a problem, and many electronic publications rarely introduce this article. I have been engaged in the design of printed circuit boards for many years, I would like to share with you some experience on the design of printed circuit boards, hoping to serve as a reference. The Design Software of the printed circuit board was Tango several years ago, and now it uses protel2.7 for Windows.

Board layout:
RMB {
Tagshow (Event)
} "> Device placement sequence:
Place components in a fixed position that closely matches the structure, such {
Tagshow (Event)
} "> Power outlet, indicator light ,{
Tagshow (Event)
} "> Switches, connectors, and so on. After these devices are placed, use the lock of the software {
Tagshow (Event)
} "> The function locks it so that it will not be moved by mistake in the future. Special {
Tagshow (Event)
} "> Components and large components, such as heating components, transformer and IC, are placed with small components. Distance of components from the edge of the Board: if possible, all components are placed within 3mm of the edge of the Board or at least greater than the thickness of the Board. This is due to the mass production of assembly line plug-ins and wave soldering, it should be provided to the Guide trough for use, and also to prevent edge defects caused by Shape processing, if there are too many components on the printed circuit board, it is necessary to exceed the range of 3mm, you can add a secondary edge of 3mm to the edge of the board, and open a V-shaped groove on the secondary side. You can just break it by hand during production.

Isolation between high and low voltage:
High-voltage {
Tagshow (Event)
} "> The components of the circuit and low-voltage circuit must be separated from those of the low-voltage circuit. The isolation distance is related to the withstand pressure, generally, the distance between the 2000kv board is 2mm, and the proportion is also increased. For example, to withstand the pressure test of 5mm V, the distance between high and low voltage lines should be more, in many cases, to avoid electric crawling, it is still slotted between high and low voltage on the printed circuit board.

Cabling of printed circuit boards:
The layout of printed wires should be as short as possible, and should be more like this in High-frequency circuits; the bending of printed wires should be rounded, the right angle or sharp angle will affect the electrical performance in the case of high-frequency circuits and high wiring density. When the two panels are cabled, the wires on both sides should be perpendicular, oblique, or bent to each other, avoid parallelism to reduce parasitic coupling. As {
Tagshow (Event)
} "> Input and {
Tagshow (Event)
} "> The printed wires used for output should avoid adjacent parallel cables as much as possible to avoid re-granting. It is best to add a ground wire between these wires.

Width of printed wires:
The wire width should meet the electrical performance requirements and facilitate production. Its minimum value is equal to {
Tagshow (Event)
} "> The current size is determined, but the minimum value should not be less than 0.2mm. In high-density and high-precision printed lines, the width and spacing of wires are generally 0.3mm; the temperature rise of the wire must be considered in the case of large current. The single-panel experiment shows that when the copper foil thickness is 50 μm, the wire width is 1 ~ 1.5mm, when the current 2a, the temperature rise is very small, therefore, generally choose 1 ~ The 5mm-width Wire may meet the design requirements without causing temperature rise. The public ground wire of the printed wire should be as coarse as possible. If possible, it should be larger than 2 ~ 3mm lines, this is particularly important in the circuit with a microprocessor, because the local line is too small, due to the flow of current changes, changes in the ground potential, the microprocessor timed {
Tagshow (Event)
} "> The signal level is unstable, which degrades the noise tolerance. In dip {
Tagshow (Event)
} "> The encapsulated IC is laid between its feet {
Tagshow (Event)
} "> Apply the principles 10-10 and 12-12, that is, when the two feet pass through two lines
The PAD diameter can be set to 50mil, and the width and line distance are both 10mil. When only one wire is used between the two ends, the pad diameter can be set to 64mil, and the width and line distance are both 12 mil.

Spacing of printed wires:
The distance between adjacent wires must meet electrical safety requirements. In order to facilitate operation and production, the distance should be as wide as possible. Minimum spacing should be at least affordable {
Tagshow (Event)
} "> Voltage. This voltage generally includes the operating voltage and additional
Peak Voltage caused by fluctuation voltage and other causes. If {
Tagshow (Event)
} "> When the technical conditions allow some degree of metal particles to exist between wires, the gap is reduced. Therefore, the designer should take this factor into consideration when considering the voltage. When the wiring density is low, the signal line spacing can be appropriately increased, and the signal lines with high and low levels of disparity should be as short as possible and increase the spacing.

Shielding and grounding of printed wires:
Public Ground Wires for printed wires should be arranged at the edge of the printed circuit board as much as possible. The copper foil should be retained as much as possible for the printed circuit board as the ground wire. the shielding effect is better than that of a long ground wire. The transmission line characteristics and shielding effect will be improved, and the distribution will be reduced {
Tagshow (Event)
} "> Function of capacitor. The public ground wires of printed wires are best formed to form a loop or mesh. This is because when there are many integrated circuits on the same board, especially components with high power consumption, the Grounding Potential Difference is caused by graphical limitations, as a result, the noise margin is reduced. When the circuit is made, the grounding potential difference is reduced. In addition, the grounding and power supply graphics should be as close as possible {
Tagshow (Event)
} "> Data flows in parallel, which is the secret to suppress noise enhancement. multiple layers of a multilayer printed circuit board can be used as the Screen Layer. Both the power layer and the ground layer can be regarded as the screen layer, generally, the ground layer and power supply layer are designed in the inner and outer layers of multilayer printed circuit boards.

Pad:
Solder Pad diameter and inner hole size: the inner hole size of the pad must be considered in terms of the component lead diameter and tolerances, as well as the TiN layer thickness, aperture tolerances, and the thickness of the metallic plating layer, the inner hole of the pad is generally not less than 0.6mm, because it is not easy to process the less than 6mm mm hole when opening and punching. Generally, the diameter value of the metal pin plus 2mm mm is used as the inner hole diameter of the pad, such {
Tagshow (Event)
} "> When the diameter of the resistor metal pin is 5mm MPa, the diameter of the inner hole of the pad is 0.7mm. The diameter of the pad depends on the diameter of the inner hole, as shown in the following table:
Hole Diameter
0.4
0.5
0.6
0.8
1.0
1.2
1.6
2.0
Pad diameter
1.5
1.5
2
2.5
3.0
3.5
4

 

1. when the diameter of the pad is 5mm, in order to increase the peel strength of the pad, the length of the pad is not less than 1.5mm, the width is 5mm mm and the length of the Round pad, this pad is the most common in integrated circuit PIN pad.
2. The following formula can be used to select the pad diameter that exceeds the range listed above:
Holes smaller than 4mm in diameter: D/D = 0.5 ~ 3
Holes larger than 2mm in diameter: D/D = 1.5 ~ Formula 2: (D-pad diameter, D-hole diameter)
Other notes about pad:
The distance between the inner hole edge of the pad and the Printed Board edge is greater than 1mm, which can avoid pad defects during processing.

Pad opening:
Some devices are welded after wave soldering, but the inner hole of the pad is seed by Tin after wave soldering, so that the device cannot be plugged in. The solution is to open a small port for the pad during printing board processing, in this way, the inner hole will not be blocked during wave soldering, and normal welding will not be affected.

Solder Pad tear filling: When the wire connecting to the pad is smaller, the connection between the pad and the wire should be designed as a drop-down. This advantage is that the pad is not easy to skin, it is not easy to disconnect the wire and pad. Adjacent pad should avoid sharp angle or large area of copper foil, acute angle will cause wave soldering difficulties, and there is a risk of bridging, large area copper foil due to excessive heat dissipation will lead to difficult welding. Large-area copper application: Large-area copper application on printed circuit boards is often used in two ways, one is cooling, the other is used for shielding to reduce interference, A common mistake for beginners to design printed circuit boards is that there is no window open when applying copper to a large area. However, due to the fact that the adhesive between the substrate and copper foil of printed circuit boards is immersed or heated for a long time, the production of Volatile gases cannot be ruled out, and heat is not easy to emit, resulting in copper foil expansion and shedding. Therefore, when using a large area of copper, the open window should be designed as a mesh.

Use of cross-wiring: in the design of single-sided printed circuit board, when some lines cannot be connected, cross-wiring is often used. In beginners, cross-wiring is often random, long, short, this will cause inconvenience to production. When cross-wiring is placed, the fewer the types, the better. Generally, only three types are set: 6mm, 8mm, and 10mm. exceeding this range will cause inconvenience to the production.

What is electromagnetic interference (EMI) and electromagnetic compatibility (EMC)
(Electromagnetic interference), which has two types: Conduction Interference and radiation interference. Conduction Interference refers
The medium coupling the signal (interference) on an electrical network to another electrical network. Radiation interference refers to the interference source passing through space
Couple the signal (interference) to another electrical network. In the design of high-speed PCB and system, high-frequency signal lines and integrated electrical
Channel pins and various connectors may become radiation sources with antenna characteristics, which can emit and affect electromagnetic waves.
The normal operation of the system or other subsystems in the system.
Since the emergence of electronic system noise reduction technology in the middle of 1970s
In 1990, relevant regulations on commercial digital products were proposed with the European Union at 1992, which required various companies to ensure
Their products comply with strict magnetization and emission standards. Products that comply with these rules are called EMC with electromagnetic compatibility
(Electromagnetic compatibility ).
What is signal integrity)
Signal integrity refers to the signal quality on the signal line. The signal has good signal integrity.
When necessary, it has the required voltage level value. Poor signal integrity is not caused by a single factor
It is caused by a variety of factors in the design of the Board. Major signal integrity problems include Inverse
Shot, oscillating, ground bullet, crosstalk, etc. Common signal integrity problems and solutions
What is reflection)
Reflection is the echo on the transmission line. Transmit part of the signal power (voltage and current) to the online and reach
To the load, but some of them are reflected. If the source and load have the same impedance, reflection will not
It will happen. If the source and load impedance do not match, online reflection will occur. The load will return some of the voltage back to the source.
. If the load impedance is less than the source impedance, the reflected voltage is negative. Otherwise, if the load impedance is greater than the source impedance,
The reflected voltage is positive. Geometric Shape of cabling, incorrect wire end connection, transmission through connectors and power plane
Such reflection is caused by changes in factors such as discontinuous.
What is crosstalk (crosstalk)
Crosstalk is the coupling between two signal lines. The mutual inductance and mutual capacity between signal lines lead to online noise. Capacity
Coupling leads to coupling current, while inductive coupling leads to coupling voltage. PCB Board layer parameters, signal line spacing,
The electrical characteristics and connection modes of the drive end and the receiver end have a certain impact on crosstalk.
What is overshoot and undershoot)
Overshoot is the first peak or valley value that exceeds the set voltage-for the rising edge, it refers to the highest voltage and
The descent edge is the lowest voltage. Downstream refers to the next valley value or peak value. Excessive overhead can cause dual-pole Protection
Management, leading to premature failure. Excessive downstream traffic can cause false clock or data errors (by mistake ).
What is ringing and rounding)
The phenomenon of oscillation is repeated over and down. Signal oscillation and surround oscillation are caused by over-line inductance.
And capacitor, the oscillation is under Damping State, and the surround oscillation is under Damping State. Signal integrity problems
It often occurs in cyclic signals, such as clocks. The same as the reflection, the oscillation and the surround oscillation are also caused by multiple factors.
The oscillation can be reduced through an appropriate client connection, but it cannot be completely eliminated.
What is ground electrical plane bounce noise and reflux noise?
When there is a large current surge in the circuit, it will cause the ground plane rebound noise (hereinafter referred to as the ground bullet), such as a large number of cores.
When the chip output is turned on at the same time, a large transient current will flow through the power plane of the chip and the Board.
The inductance and resistance of the package and power supply plane will cause power noise, which will be produced on the real ground plane (0 V ).
Voltage fluctuations and changes, which may affect the movements of other components. Increase of load capacitance and Load
The decrease of the resistance, the increase of the local inductance, and the increase of the number of switching devices will lead to the increase of the ground Bomb. By
It is divided by the ground electrical plane (including power supply and ground), for example, the ground layer is divided into digital, simulated, and shielded
When the digital signal reaches the analog ground area, it will generate the back-flow noise of the ground plane. The power supply layer can also
Can be divided into 2.5 V, 3.3 V, 5 V, etc. Therefore, in the design of multi-voltage PCB, the bounce noise of the ground electrical plane
Sound and reflux noise require special attention.
What is the difference between time domain and frequency domain?
Time Domain is a process of voltage or current changes based on time.
. It is usually used to find the delay (delays), offset (Skew), and overhead from the pin to the pin.
(Overshoot), undershoot, and settling times ).
Frequency Domain is a frequency-based voltage or current change process.
Observed by the spectrum analyzer. It is usually used to compare waveforms with fcc and other EMI control restrictions.
What is impedance)
Impedance is the ratio of input voltage to input current on the transmission line (z0 = V/I ). When a Source sends a message
It will hinder its drive until 2 * TD, the source does not see its change, Here TD is
Line delay (Delay ).
What is settling time)
The establishment time is the time required to stabilize an oscillating signal to a specified final value.
What is the latency from Pin-to-pin (Delay)
Pin-to-pin latency refers to the time when the status of the driver changes to the status of the receiver.
. These changes usually occur at 50% of the given voltage, and the minimum latency occurs when the first output goes beyond the given
The maximum latency occurs when the output of the last voltage threshold is crossed.
(Threshold) to measure all these conditions.
What is an offset (Skew)
The signal offset is the time deviation between the same network and different receivers. Offset is also
The Time deviation between the clock and data on the logic gate.
What is slew rate)
Slew rate is the edge slope (the ratio of time changes related to the voltage of a signal ). I/O Technology
The operation specification (such as PCI) state is between two voltages, that is, the slope (slew rate), which can be measured
.
What is quiescent line)
During the current clock cycle, no switchover occurs. Also known as "stuck-at" line or static
Line. Crosstalk can cause a switching of a static line within the clock cycle.
What is false clocking)
A false clock refers to a clock that unconsciously changes the state (sometimes in the devil or VIH) over the threshold value (threshold ).
). It is usually caused by undershoot or crosstalk.
What is an IBIS model?
The IBIS (input/output buffer information Specification) model is based on
The V/I curve modeling method for I/O buffer quickly and accurately reflects the electrical characteristics of chip drives and receivers.
Is an international standard that provides a standard file format to record, such as the drive source output impedance, rise/down
Parameters such as time drop and input load are suitable for Calculation and Simulation of High-frequency effects such as oscillation and crosstalk.
The IBIS specification was initially compiled by an industrial organization called the IBIS open forum, which is composed
Some EDA manufacturers, computer manufacturers, half-guide manufacturers, and universities. Version release of ibis
Version1.0 was launched for the first time in April 1993, and version1.1 was released after modification in June of the same year.
Version2.0 was adopted in San Diego in, and upgraded
Version2.1 version, in December 1995 its version2.1 version became ANSI/EIA-656 standard, 1997
Version3.0 was released in 62012. In of the same year, it was accepted as the IEC-1 standard and upgraded
Version3.1, the latest version of version3.2 was released in January 1999.
IBIS is itself a file format that describes how to record a core in a standard IBIS File
The different parameters of the drive and receiver, but does not explain how these recorded parameters are used.
The number must be read by a simulation tool using the IBIS model. To use IBIS for actual simulation, you need to complete the following four tasks:
(1) obtain the source information about the chip driver and receiver;
(2) Obtain a method to convert the original data to the IBIS format;
(3) provide layout and wiring information that can be recognized by computers for simulation;
(4) provides a software tool that can read ibis and layout cabling formats and perform analysis and computing.
IBIS is a simple and intuitive file format and is suitable for use similar to spice (but not spice, because
IBIS file format cannot be directly read by SPICE tool) circuit simulation tool. It provides drives and connectors
Description of the behavior of the receiver, but does not disclose the intellectual property details of the internal structure of the circuit. In other words, the seller can
Use the IBIS model to describe their latest door-level design work, without disclosing too many products to their competitors
Product Information. In addition, because IBIS is a simple model, when it is used as a simple load simulation
All spice transistor-level model simulation needs to save 10 ~ 15 times the computing workload.
IBIS provides two complete V-I curves that represent the drive in high and low states, and
The state transition curve at a specified conversion speed. V-I curves are used to protect Ibis
Modeling capabilities for non-linear effects, such as the driving source and output of the tube and TTL chart.
The advantages of the IBIS model can be summarized as follows:
1. Accurate models can be provided in terms of I/O non-linearity, And the encapsulated parasitic parameters and
ESD structure;
2. Faster simulation speed than structured methods;
3. It can be used for system board-level or multi-board signal integrity analysis and simulation. Signal Analysis Using the IBIS Model
Overall problems include crosstalk, anti-radiation, oscillation, uplink, downlink, unmatched impedance, transmission line analysis, and extension.
Structure analysis. In particular, IBIS can accurately and precisely simulate high-speed vibrations and Crosstalk. It can be used for detection.
Test the signal behavior under the rising time condition of the worst case and some situations that cannot be solved by physical testing;
4. models can be obtained from semiconductor manufacturers free of charge, and users do not need to pay additional costs for models;
5. compatible with a wide range of simulation platforms in the industry.
Of course, IBIS is not perfect, and it also has the following Disadvantages:
1. multi-chip vendors lack support for the IBIS model. Without the IBIS model, the IBIS tool does not
Legal work. Although the IBIS file can be manually created or automatically converted using the SPICE model
Any Conversion Tool is powerless to get the minimum rise time parameter from the manufacturer
2. IBIS cannot ideally handle rise time controlled drive type circuits, especially those packages
Circuits with complex feedback;
3. IBIS lacks the ability to model ground bullet noise. IBIS model version 2.1 contains descriptions of different pins
The mutual inductance of the combination can be used to extract some useful ground Bomb information. The reason it does not work is modeling.
Mode. When the output changes from high to low, the large ground bullet voltage can change the line of the output drive.
Yes.
What is SPICE model?
Spice (simulation program with integrated circuit emphasis ).