Fans-rt Task Scheduler-Stack Switch chapter (2) Stack model

Source: Internet
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As we mentioned earlier, the switch of the task is the switch of the stack (first of all the task context), and the code simply describes the switching process of the stack switch. However, to successfully switch from one task to another, you must also understand the characteristics of the interrupt processing in the current operating mode of the CPU. For example, what registers will be saved when entering the stack, whether the CPU supports the hardware dual stack (or even more layers of the stack), if multilayer stacks are supported, what registers the outer stack holds before entering the interrupt, which registers the inner stack holds, whether the outer stack pointer is saved in the inner stack, and so on, These attributes determine the state of the breakpoint scene, and also determine what the operating system code needs to stack the registers that are not automatically saved by the CPU before the task is switched, and how to initialize the new task when the new task is created.

There are 5 subfolders under the/platform/board/stm32 of the Fans-rt source path, and there is a Kboard_interrupt.s file in each of the 5 folders, with a configuration description in the file header comments for each file:

;    Configuration:
;     System Global Core stack                  yes/no
;     The local core stack of general task      yes/no
;     The LOACL core stack of kernel task       yes/no
;     The local user stack of general task      yes/no
;     Hardware supported task switch IRQ        yes/no
;     Hardware supported double stack           yes/no
This is a configuration description of the CPU stack model, which is related to CPU characteristics and directly affects the implementation of the stack switch code. The meaning and impact of each item description pair are as follows:

First item: System global Kernel stack

Indicates whether the system global kernel stack is supported, if the key is yes, it indicates that there is only one kernel stack in the system, all common tasks use the same kernel stack (only one task in the system can request kernel functionality, and if the task is executing in the kernel, the kernel function must be completed. The task switch can only be performed when the task is returned from the soft interrupt context, in fact CORTEX-M3 supports this stack model, the CPU provides MSP and PSP two stack pointers, when interrupts automatically switch from the user-state PSP to the MSP, the benefit of the global kernel stack is that all tasks share a kernel stack, The maximum stack depth of the kernel is predictable, and different tasks executing at the non-privileged level require different stack sizes for each task, which can be configured with a different user stack size, which protects the kernel and avoids the wasted space on the stack for environments that require a lot of tasks.

Second item: Common task local kernel stack

Indicates whether the system supports one kernel stack per task, in fact CORTEX-M3 hardware does not directly support this model, because the CORTEX-M3 hardware implementation does not support the concept of tasks, can not support automatic overloading Msp,/platform/board/huge The code in is implemented by means of software. A stack model with local kernel stacks can be supported on X86 CPUs, X86 provides a structure called task Status segment (TSS) that can be loaded into TSS to get stack pointers for any task from ring0-ring3 different privileged layers, and the hardware supports automatic switching of task stack pointers.

Third item: Kernel task local kernel stack

Indicates whether the system needs to support kernel tasks, so-called kernel tasks are privileged-level tasks that can be executed to access all the resources that the kernel can access, such tasks are designed for subsequent drive models (perhaps not, I want to be able to put all the functions except system services in the user layer implementation), The stack initialization method of the kernel task is different from the normal task (refer to the function core_fillstack in the source path/PLATFORM/ARCH/STM32/KARCH-STACK.C), the interrupt of the kernel task returns the LR value 0xfffffff9, The normal task returns the LR value of the user layer to 0XFFFFFFFD (the SS and CS registers are obtained via the iretd instruction on X86 and the privileged level of the returned code snippet is determined by the SS and Cs Cpl). The kernel task does not make a stack switch when an interrupt occurs, nor does the stack switch when it returns from the interrupt.

Item Fourth: Common Tasks local user stack

Indicates whether the system supports the local user stack (no global user stack), if the local user stack is supported, then the system must support the dual stack, during the execution of ordinary tasks interrupt, need to switch the stack from the user stack to the kernel stack (software implementation switching or hardware automatic switching). If the local task user stack is not supported, all tasks use the kernel stack (one kernel stack per task), each with a kernel privilege level and access to all kernel resources. The interrupt model appears on a CPU platform that does not support privileged levels, such as Intel 8086/8088. This interrupt model is supported on small-capacity cortex-m3 chips, which can save overhead on the stack for environments with very few task requirements.

Item Fifth: Hardware support task switching

In effect, it means that PENDSV interrupts like CORTEX-M3 are supported, PENDSV is a feature of the CPU platform, and not all platforms support such interrupts. If supported, then the PENDSV interrupts the way the stack and other interrupts are in different ways. Under this model, the PENDSV interrupt requires a stack of all CPU registers, but the other interrupts can be stacked only against the registers used, because the task context switch does not occur in the other interrupts and does not require the breakpoint stack state of the task switching scene to be built.

Sixth: hardware supports dual stacks

Just as cortex-m3 can have MSP/PSP, the stack switch occurs automatically when the privilege level changes. If the hardware does not support dual stacks, and the software wants to use a double stack to reduce the stack-to-memory overhead of a large number of task environments, you can implement a software stack switchover in the code of the Interrupt service program (for example, the/platform/board/stm32/soft implementation). Before making a stack switch, the interrupt handler saves the current task's CPU register to the outer stack, switches to the inner stack and then invokes the Interrupt service program, returns the outer stack pointer stored in the task context, recovers the CPU register from the outer stack, and then returns to the task breakpoint to continue execution.

FANS-RT has six configurations associated with the stack, but these six configurations can be combined in a variety of environments, while FANS-RT implements 5 common environments on CORTEX-M3, in fact these 5 environments do not make sense on cortex-m3, To achieve their purpose is only to verify that the current FANS-RT kernel code in the task switching section can support a variety of microcontroller hardware configuration.

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