-2018-2019-1 20165206 "Information Security system Design Fundamentals" 4th Week Study summary-Textbook learning content Summary
Programmer-Visible state: Each instruction in the Y86-64 program reads or modifies portions of the processor state, which is known as the programmer's visible state. Includes: program register, condition code, program status, program counter, and memory.
Y86-64 directive: The y86-64 instruction is a subset of the x86-84 instruction set. It includes only 8-byte integer operations. There are 4 integer operations directives: ADDQ, SUBQ, ANDQ, and Xorq. There are 7 jump commands: jmp, Jle, JL, je, jne, Jge, and JG. There are 6 conditional delivery directives: Cmovle, CMOVL, Cmove, Cmovne, Cmovge, and CMOVG.
Assemble the conversion between machine codes.
Y86-64 Status Code:
Code value 1, named AOK, indicating normal operation;
The code value 2, named Hlt, indicates that the halt command is executed by the encountering device;
Code value 3, named ADR, indicates that an illegal address was encountered;
Code value 4, named Ins, indicates that an illegal instruction was encountered.
Y86-64 Instruction Set:
Y86-64 Program Register Identifier:
function code for the y86-64 instruction set:
Y86-64 instances:
Example code on the textbook:
The X86-64 code obtained after the GCC compilation and Objdump disassembly:
The compilation code of Y86-64 is given in the textbook.
Logic gate: The logic gate is the basic calculating unit of the digital circuit. They produce output that is equal to some boolean function of their input bit value. Include: with (and), or (or), and non (not).
Combinational circuits: The combination of a lot of logic gates into a network, you can build a computational block.
Combinational Circuits and HCl Boolean expressions
Combination of Word-level circuits and HCl integer expressions
The calculations required to implement all y86-64 directives can be organized into 6 basic stages. Include: Refer to, decode, execute, visit, write turn update pc.
Fetch refers to: The reference phase reads the instruction bytes from memory, and the address is the value of the program counter.
Decoding: The decoding phase reads a maximum of two operands from the register file, obtains the corresponding value, and reads the register specified in the instruction.
Execution: The ALU either executes the operation specified by the instruction, computes the valid address of the memory reference, or increases or decreases the stack pointer.
Visit: The data can be written to memory or read from memory.
Writeback: Write-back Stage can write up to two results to the register file.
Update PC: Sets the PC to the address of the next instruction.
- Seq Timing:
The SEQ implementation consists of a combination of logic and two types of memory devices: clock registers and random access memory.
Organization calculation principle: never read back. The processor never needs to read the state updated by the instruction in order to complete the execution of an instruction.
-Last week's quiz summary-wrong title 1:
X86-64 Linux, the value of%RBP is 0x108, and after Pushq%eax, the value of%RBP is ()
A.
0x100
B.
0x108
C.
0x110
D.
0x118
- Answer: B
- Parse: Push does not affect the value of%RBP.
-Wrong question 2:
X86-64, the (%RSP) register is used to hold the end position of the runtime stack (top of the stack).
-Wrong question 3:
In the Linux assembly, the statement that destroys the stack frame is ()
A.
Movq%RBP,%RSP
POPQ%RBP
B.
Leave
C.
Enter
D.
Pushq%RBP
Movq%RSP,%RBP
- Answer: A B
- Analytical:
Leave is equivalent to:
Movq%RBP,%RSP
POPQ%RBP
2018-2019-1 20165206 "Information Security system Design Fundamentals" 4th Week Study Summary