ARM development problems

Transferred from zyboy2000

Note that some parts of assembly code must be the top level and some must be spaces. Otherwise, compilation may fail.

 

(1) Heap settings

After code B _ mian is started, the program does not jump to the main function, but enters an exception interrupt.

Cause: Through disassembly, we can see that after executing the B _ Mian command, it does not jump to the main function immediately, but to the _ main library function entry first, execute some stack copying and other initialization operations, and finally jump to the main function. An exception may occur because the heap or stack settings are incorrect. (In an example, you can change the starting address of the heap to a smaller value)

 

(2) debugging of arm in Ram

 

Irom1: 0x4000000 0x10000 (the irom1 address must be set to the ram space)

Iram1: 0x4010000 0x8000

 

In the RAM. ini file

PC = 0x04000000;

 

(3) how to specify the runtime space of a code segment

Select the file (*. c), right-click (Options for file '*. C ') ----> memory assignment can specify the space in which the file code runs (either in flash or in Ram)

 

(4) binfile generated by MDK

You can use fromelf.exe with armband to convert *. axf to *. binfile.

 

Options for target ----> User ----> run #1 ----->

 

C:/Keil/ARM/bin31/fromelf.exe -- bin-o./output/axf_to_bin.bin./output/axf_to_bin.axf

 

(4) Meaning of compiled code

Program size: code = 2356 ro-Data = 32 RW-Data = 28 Zi-Data = 1292

 

========================================================== ==========================================================

Total Ro size (code + RO data) 2388 (2.33kb)
Total RW size (RW data + Zi data) 1320 (1.29kb)
Total Rom size (code + RO Data + RW data) 2416 (2.36kb)

========================================================== ==========================================================

 

Execution region rw_iram1 (base: 0x04000000, size: 0x00000528, Max: 0x00018000, absolute)

Base ADDR size type ATTR idx E Section name object

0x04000000 0x0000001c data RW 89. Data main. o
0x0400001c 0x00000004 pad
0x04000020 0x00000508 zero RW 1 stack str91x. o

 

Code indicates the amount of program code

Ro-data indicates a fixed constant (const variable)

RW-data indicates the initialization constant (char gloab_test = 5)

Zi-data indicates that the initialization constant is not initialized, that is, zero (char gloab_test = 0)

Space written to falsh: code + RO Data + RW data

Ram space: RW data + Zi data

In the startup code, it is clear that there is a RW data copy process, which should also include the initial Zi-data clearing process, heap and stack initialization process, these should be implemented after the B _ Mian command, and can be seen only through disassembly.

 

(5) Non-Aligned Data Pointer

C and C ++ programming standards stipulate that a pointer to a data type must be consistent with the data address alignment of this type, therefore, the arm compiler expects the C pointer in the program to point to the word alignment address in the memory, because this allows the compiler to generate more efficient code.

For example, if you define a pointer to the int data type to read a word from the pointer, the arm compiler will use the LDR command to complete this operation. If the read address is a multiple of four (that is, at the boundary of a word), it can be read correctly. However, if the address is not a multiple of four, a LDR command returns a cyclic shift result, instead of executing a truly un-aligned word load. The cyclic shift result depends on the offset of the address to the word boundary and the endianness used by the system ). For example, if the Code requires loading data from the address 0x8006 pointed to by the pointer, it is required to load 0x8006, 0x8007, 0x8008
And 0x8009. However, on the ARM processor, this access operation loads 0x8004, 0x8005, 0x8006, and 0x8007 bytes. This is the cyclic shift result obtained by using pointer access on an unaligned address.

Therefore, if you want to define a pointer to a specified address (that is, the address is aligned with an unnatural boundary), you must use the _ packed qualifier to define the pointer. For example,

_ Packed int * PI; // pointer pointing to a non-Word Memory Address

When the _ packed qualifier is used, the arm compiler generates a byte access command (ldrb or strb command) to access the memory, so you do not have to consider the pointer alignment issue. The generated code is a sequence of byte access, or depends on the Compilation options, shift and shield related to variable alignment. However, this results in loss of system performance and code density.

It is worth noting that the pointer limited by _ packed cannot be used to access the peripheral registers mapped to the memory, because the arm compiler can use multiple memory accesses to obtain data. Therefore, the locations near the actual access address may be accessed, and these nearby locations may correspond to other external registers. When bitfield is used, the arm program accesses the entire struct instead of the specified field.

 

 

(6) Ro base settings

In the "link file" option, set the RO base address of the image file to the starting address of the actual running of the image file. For example, it is incorrect to set Ro base to 0x30000000 and download it to the 0x0 address for execution. You must copy the code to the starting address of 0x30000000 to start executing it correctly, or set Ro base to 0x0.

 

(7) _ IRQ keywords

Compile and call the C interrupt function

 

Compile file-related code (*. s)

Import irq_handler; cannot be written in the top level

 

Irq_addr DCD irq_handler

 

 

C file code (*. c)

_ IRQ void irq_handler (void ){
If (irqsig & 0x00000004) {// timer 0 interrupt
T0clri = 1; // clear timer 0 interrupt
T0_tick ++; // increment timer 0 tick
}
}

 

"_ IRQ" is used to declare an IRQ interrupt service program. If "_ IRQ" is used to declare a function, this function indicates an IRQ interrupt service program, the compiler automatically adds the code to the function to interrupt field protection.