[Black Gold tutorial notes 001] VerilogHDL literacy text-notes & errata

00w.w.w.loghdlLiteracy text-notes &Errata

 

 

1. Original akuei2
2. Contact info: blog. ednchina. Con/akuei2

 

Errata 001:

Page 3

0.1 The VDL in the following segments of various HDL languages should be VHDL.

 

Errata 002:

Page 3

0.2 the above line of notes on the level of HDL should be the author.

 

Errata 003:

Page 5

0.4 is it really difficult to master the Tilde-HDL language? The text in the last and third lines of the brackets above should be very familiar.

 

Errata 004:

Page 5

Code module add_module

Either or is missing between the always sensitive list CLK and rstn,

 

Rtemp <= 16 'b0; not 4' 0

 

Errata 005:

Page 11

The last line of the output selector's always @ () code. Q should be RQ

 

Errata 006:

Page 21

In the preceding code block, rled <= 4 'b0001; instead of 4' b0000

 

Errata 007:

Page 21

In the following code block, branch 1 of case should be1:

 

Errata 008:

Page 22

In the case statement of a code block, sum of the 0 branch <= 8'd0; Missing;

 

Errata 009:

Page 22

In the code block, branch 1 of case should be1:

 

 

 

 

1. How can we master the well-known image search language (HDL?

The first is the structure of the language (modeling), and the second is the usage of the language (simulating sequential operations ).

 

1. All the examples designed by the author are directly downloaded to development. If you cannot grasp the concept of time sequence, simulation will be very difficult. Let's learn more about simulation first...

 

1. The integrated language and verification language are two parts of the language.

 

1. 0.7 integrated language of OpenGL

 

Eg01. Reg and wire;

Eg02. diversity of always;

Eg03. = and <= values;

Eg04. */%;

 

1. Basic Unit of low-level modeling: function module, control module, and combination module.
2.  

 

[Black Gold tutorial notes 001] VerilogHDL literacy text-notes & errata