FPGA notes (11)-FPGA pin Verification

FPGA pin Verification Step (quartusii) 1, new TXT file, write pin configuration (no write voltage type)
Syntax only set_location_assignment pin-to pin name
such as: Set_location_assignment pin_b11-to CLK2

Set_location_assignment pin_g7-to P1db[0] (This is a multi-bit input and output, you need to disassemble the configuration) diagram:

2, new project, choose the type of FPGA you want to use, if not, you need to add devices library, or change the quartusii version, and then write a. v file that describes the input and output status of the PIN.


3. The project has a. qsf file, open with Notepad, and copy the information in the TXT text into the. qsf file.

4, so far only determined to pin the output input to the state, also need to edit the pin voltage value and type, Assignment->pin planner, through the I/obank to determine the IO port voltage, as well as the type of voltage you want to use.

5, compile, if there are errors, there may be the following conditions:

In this case, you need to change the pin used until the compilation is no error.

Haven't learned much about FPGA lately, sin sin ~