High-resolution digital camera Design Based on USB2.0

Source: Internet
Author: User
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Abstract:A high-resolution digital camera based on USB2.0 protocol is introduced. The basic hardware circuit and software design method of high-resolution digital camera are presented by using CMOS image sensor ob9620 and USB controller CY7C68013.


USB2.0; I2C; camera; ov9620

1 Overview

Currently, both bus interfaces (USB and IEEE 1394 interfaces) that can transmit high-quality video signals support plug-and-play, and are easy to expand and use. However, the cost of the IEEE 1394 Interface is relatively high. Therefore, more USB interfaces are currently used.

There are four USB data transmission modes: bulk transfers, interrupt transfers, isochronous transfers, and control transmission ). The block transmission mode is generally used when a large amount of accurate data needs to be quickly transmitted. The interrupted transmission mode should be used when the real-time data is transmitted. The current USB2.0 specification is in the original low speed mode (Low Speed) 1.5 Mb/s, full speed mode (full speed) with 12 Mb/s support for up to 480 Mb/s high speed mode, the USB bus can truly become a standard connection bus for high-speed applications. In USB, the message can be sent 8 ~ 10 microframes, which greatly improves the transmission rate and reduces the cache requirements. USB2.0 USB2.0 is fully compatible with the following protocols. In full speed mode and low speed mode, the host controller and hub can also transmit data at high speed, but the original transmission mode is still maintained between the hub and the peripherals, this minimizes the bandwidth conflict between devices.

2 hardware circuit

Omnivision Technologies Inc. the company's ov9620, as a video signal acquisition chip, uses EZ-USB fx2 as a USB control chip and provides a working clock for the ov9620, E2PROM uses 24lc65, connected to all chips through the I2C bus. The hardware connection diagram is shown in Figure 1.

2.1 main features of ov9620

OV9620 is a high-performance 1.3 million pixel color CMOS digital image sensor chip developed by OmniVision for digital cameras and cameras. Compared with traditional CCD sensors, the most obvious advantage of CMOS is high integration, low power consumption, low production costs, and easy integration with other chips. The total image area of the chip is 6.82x39mm2, and the image area is 6.66x32mm2, which is very helpful for product miniaturization.

The chip supports SXGA (1280x1024 resolution) and VGA (640x480 resolution) modes and SCCB (Serial Camera Control Bus) interfaces, using a 24 MHz crystal oscillator, the built-in 10-bit A/D converter provides 10-bit digital video signals. In addition, the chip can also output pixel clock and line and field synchronization signals, and can be directly connected to the dedicated integrated circuit system. Its back-end system can be controlled through the SCCB interface. You can use the USB2.0 controller to provide 15 fps sxga or 30fps VGA dynamic images in P4 1.5g or above systems. The chip uses a Bayer optical filter array to divide the input optical signals into RGB three primary colors. The pixel array has 1312x1036 = 1359232, and the imaging pixel has 1280x1024 = 1310720. Non-imaging pixels can be used as optical black body pixels for black value calibration to compensate for light-induced Temperature and exposure changes.

The SCCB interface used in the chip is a three-line Continuous bus (SCS, SIO1, and SIO0) developed by OmniVision to control image sensors ), SCS are used for chip selection (low-level effective). When the chip is selected, SIO1 and SIO0 are functional and use compatible with I2C bus.

In addition, the OV9620 also provides a control signal input (PWDN), which can be used to implement power-down switching. In this design, because OV9620 works with other chips at the same time, PWDN is used for control instead of chip selection.

Main characteristics of 2.2 EZ-USB FX2

EZ-USB FX2 (CY7C68013) is a USB2.0 control chip designed by Cypress for high-speed transmission peripherals. The chip contains an enhanced 8051 processor and a serial interface engine (SIE) one USB transceiver, KB On-chip RAM, 4 kb FIFO memory, and one universal programmable interface (GPIF ).

FX2 adopts the quantum FIFO processing architecture, and Its USB interface and application environment can directly share the FIFO, while the microcontroller does not participate in data transmission but allows access to these shared FIFO in FIFO or RAM mode, this effectively solves the bandwidth problem of USB high-speed mode.

FX2 has an I2C compatible port. When FX2 acts as the master controller and the clock frequency of the SCL is 100/400 kbps, this port is compatible with the I2C bus. Generally, this port is driven by two internal controllers: one is automatically reading VID/PID/DID and configuration information during program loading, and the other is 8051 in the chip, 8051 use the I2CTL and I2DAT registers in the chip to control the peripheral devices mounted to the I2C bus. Specifically, when the system is powered on, FX2 will monitor the I2C port through internal logic. If any E2PROM with the IP address 0xC0 or 0xC2 is found, you can use the VID/PID/DID value in the internal bucket 0xC0 of E2PROM or load the content of E2PROM to the internal RAM.

2.3 Circuit Principle and Design

The I2C bus can be used to connect the USB controller to the image sensor. E2PROM (24LC65) is used as the Code memory, and then the firmware program is loaded in C2 mode of FX2. After the system is powered on and reset, the USB controller in the active mode outputs the start signal through PA1 and transmits it back to the PWDN of the image sensor to enable the working of the image sensor in the standby mode. PCLK provides the pixel clock, HREF provides the horizontal synchronization signal, and VSYNC provides the vertical synchronization signal. The timing relationship between the two synchronous signals and the image data is shown in 2.

VSYNC triggers INT0 interruption after an image is transmitted to the Controller. Because the data volume is too large, this design does not process all data in INT0 interrupt service subprograms, but sets a flag and processes it in the main program through the status of the flag, in this way, the controller cannot respond to other interruptions because the data processing time is too long.

The FIFO of the USB controller is in slave mode. The Controller's endpoint is set to EP2-512 quad-cache; EP6-512 quad-cache, block transfer mode. This setting can meet system requirements.

3 Interface Program Design

EZ-USB FX2 provides abundant interrupt resources. In addition to the built-in 8051 interrupt resources, FX2 also provides an interrupt vector table for INT2 and INT4. The table contains 27 INT2 (USB) interrupt vector and 14 INT4 interrupt vectors. Therefore, in the design, most of the work can be done through the interrupt service subroutine. Figure 3 and figure 4 are the flowchart of the main program flow and I2C INT interrupt service subprogram respectively.

Like other controllers in the EZ-USB series, Cypress also provides FX2 with a complete development kit CY3681. This kit includes a hardware development board with 128 CY7C68013 and Corresponding Control Panel as well as the automatic generation software of GPIF code. Therefore, it is very convenient to develop firmware.

USB device drivers are designed based on WDM (Driver Model) and adopt a layered model. The application calls the Windows API function to call WIN32 subsystem, generates an IRP (I/O Request package) through the I/O manager, and then passes it to the USB driver, then, the driver executes the corresponding operations and returns the results to the I/O manager. DriverEntry can be used to set the callback routines of the entire system. When a new device and IRP need to be sent to the driver, these routines can be called by the kernel. The following is a brief description of the DriverEntry routine:

DriverObject-> DriverExtension-> AddDevice = VcameraAddDevice;

DriverObject-> DriverUnload = VcameraUnload;

DriverObject-> MajorFunction [IRP_MJ_CREATE] = VcameraCreat;

DriverObject-> MajorFunction [IRP_MJ_CLOSE] = VcameraClose

DriverObject-> MajorFunction [IRP_MJ_READ] = VcameraRead

DriverObject-> MajorFunction [IRP_MJ_WRITE] = VcameraWrite


In fact, the USB client driver contains a large number of routines, and the methods and processes for developing the USB client driver under the Windows DDK tool are described in detail.

4. Summary

At present, I have developed samples and tested some applications to achieve good results. The resolution is as high as 1280 × 1024.


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