JTAG interface circuit

JTAG (Joint Test Action Group) is an international standard Test protocol used for internal chip testing and System Simulation and testing. JTAG is an embedded debugging technology. It encapsulates a special Test circuit (TAP) in the chip ), use a dedicated JTAG test tool to test internal nodes.

 

The standard JTAG interfaces include TMS, TCK, TDI, and TDO. The JTAG interface can be used to access all components inside the chip. Therefore, it is a simple and efficient method for developing and debugging embedded systems.

 

Currently, the JTAG interface has two standards for connection: 14-pin and 20-pin. The 20-pin interface is defined as follows:

1 VTref target board reference voltage, power supply </p> <p> 2 VCC Power Supply </p> <p> 3 nTRST test system reset signal </p> <p> 5 TDI test data serial input </p> <p> 7. TMS test mode selection </p> <p> 9 TCK test clock </p> <p> 11 RTCK test clock return signal </p> <p> 13 TDO test data string line output </p> <p> 15 nRESET target system reset signal </p> <p> 4, 6, 8, 10, 12, 14, 16, 18, 20 GND grounding </p> <p> 17 19 NC not connected <br/>