1 /** @brief Function for initializing a SPI master driver.2 *3 * @param [in] p_instance Pointer to SPI Master driver instance.4 */5 Static voidSpi_master_init (nrf_drv_spi_tConst*p_instance)6 {7uint32_t Err_code =nrf_success;8 9nrf_drv_spi_config_t config =Ten { One A. irq_priority =App_irq_priority_low, -. Orc =0x80, -. Frequency =nrf_drv_spi_freq_1m, the. Mode =Nrf_drv_spi_mode_0, -. Bit_order =Nrf_drv_spi_bit_order_msb_first, - }; - + #if(spi0_enabled = = 1) - if(P_instance = = &m_spi_master_0) + { AConfig.ss_pin =Spim0_ss_pin, atConfig.sck_pin =Spim0_sck_pin; -Config.mosi_pin =Spim0_mosi_pin; -Config.miso_pin =Spim0_miso_pin; -Err_code =Nrf_drv_spi_init (p_instance, -&Config, - Spi_master_0_event_handler); in } - Else to #endif //(spi0_enabled = = 1) + - App_error_check (err_code); the}
1 uint8_t Spi_write_reg (uint8_t ucregaddr, uint8_t ucregval)2 {3uint8_t buf[2];4 uint32_t Err_code;5 6Spi_xfer_done =false;7 8buf[0] = ucregaddr<<1;9buf[1] =Ucregval;Ten OneErr_code = Nrf_drv_spi_transfer (&m_spi_master_0, buf,2Null0); A App_error_check (err_code); - - while(!Spi_xfer_done) the { - __wfe (); - } - return true; + } - + A uint8_t Spi_read_reg (uint8_t ucregaddr) at { -uint8_t buf[2]; -uint8_t rx[2]; - uint32_t Err_code; - -Spi_xfer_done =false; in -buf[0] = (ucregaddr<<1) |0x80; tobuf[1] =0x00; + -Err_code = Nrf_drv_spi_transfer (&m_spi_master_0,buf,2Rx2); the App_error_check (err_code); * $ while(!Spi_xfer_done)Panax Notoginseng { - __wfe (); the } + A returnrx[1]; the}
Now we are testing the Spi_write_reg (uint8_t ucregaddr, uint8_t ucregval)
More according to our code in Saleae Logic 1.1.16C set as shown in
What does not understand the above configuration? Please turn right to the lesson http://www.cnblogs.com/libra13179/p/5740716.html
Spi_write_reg (0x00,0x00)
Spi_write_reg (0x01,0x02) deliberately leave a thought? Why is 0x02 not 0x01, and what does it do?
SPI of NRF51822