FreeRTOS CortexM3 M4 Interrupt Priority Setting summary __ Single-chip microcomputer

PrefaceThis article explains how to set the interrupt priority for the STM32 cortex M3 and M4 series MCU in the FreeRTOS embedded operating system. Summary"1" STM32L1 series, STM32F1 series, STM32F4 series, set NVIC need to use Nvic_prioritygroup_4. The "2" preemption priority is larger than "MAX" and smaller than "LOWEST". such as Configlibrary_max_syscall_interrupt_priority=5 configlibrary_lowest_interrupt_priority=15 The specific value of the Nvic preemption priority setting should be larger than the max=5 (including equals), smaller than lowest=15 (including equals), which means that 5,6,7,8,9,10,11,12,13,14,15 is definitely a legal value. In the "3" FreeRTOS, the higher the number, the greater the priority, which can be a logical priority. In Cortex M3/M4 interrupts, the higher the number, the lower the priority, which becomes the interrupt priority. In contrast, there is a situation that is bigger than "MAX" and smaller than "LOWEST".
Schematic code "FREERTOSCONFIG.H"

/* Use the system definition, if there is one * *
#ifdef __nvic_prio_bits
	#define Configprio_bits       __nvic_prio_ BITS
#else
	#define Configprio_bits       4/        * Priority levels/*
#endif

#define Configlibrary_ Lowest_interrupt_priority
#define Configlibrary_max_syscall_interrupt_priority	5/
* the Lowest priority. * *
#define configkernel_interrupt_priority 	(configlibrary_lowest_interrupt_priority << (8- configprio_bits))/
* Priority 5, or as only the top four BITS are implemented. *///
!!!! Configmax_syscall_ Interrupt_priority must not is set to zero!!!!
http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. *
/#define Configmax_syscall_interrupt_priority 	( Configlibrary_max_syscall_interrupt_priority << (8-configprio_bits))

"Nvic Settings" "Sample A"

Nvic_inittypedef nvic_initstructure;
Nvic_prioritygroupconfig (nvic_prioritygroup_4);

Nvic_initstructure.nvic_irqchannel = xxxx_irqn;
nvic_initstructure.nvic_irqchannelpreemptionpriority = configlibrary_lowest_interrupt_priority;
nvic_initstructure.nvic_irqchannelsubpriority = 0;
Nvic_initstructure.nvic_irqchannelcmd = ENABLE;
Nvic_init (&nvic_initstructure);

"Example a"

Nvic_inittypedef nvic_initstructure;
Nvic_prioritygroupconfig (nvic_prioritygroup_4);

Nvic_initstructure.nvic_irqchannel = xxxx_irqn;
nvic_initstructure.nvic_irqchannelpreemptionpriority = configlibrary_lowest_interrupt_priority-1;
nvic_initstructure.nvic_irqchannelsubpriority = 0;
Nvic_initstructure.nvic_irqchannelcmd = ENABLE;
Nvic_init (&nvic_initstructure);

Reference Blog"FreeRTOS STM32 Transplant Notes" "FreeRTOS Learning Notes--using queues to synchronize data between Tasks" "FreeRTOS Learning Notes--two-valued semaphore" "FreeRTOS Learning Notes--mutex semaphore" "How to achieve low power consumption under FreeRTOS --msp430f5438 platform "
reference materials"1" http://www.freertos.org/RTOS-Cortex-M3-M4.html