How to use event in SystemVerilog

The event is a static object, triggered by the "-and" operator, and the process always waits for an "@" operator to be triggered. The "@" operator is edge sensitive.

Initial begin
$display ("@%0t:1: Before Trigger", $time);
->e1;
@e2;

$display ("@%0t:1: After Trigger", $time);
End

Initial begin
$display ("@%0t:2: Before Trigger", $time);
->e2;
@e1;

$display ("@%0t:2: After Trigger", $time);
End

Output Result:

# @ 0:1: Before trigger
# @ 0:2: Before trigger
# @ 0:1: After trigger

Cause:->e1 is a 0 pulse, the second thread will miss and be locked

Use Wait (. triggered ());

Initial begin
$display ("@%0t:1: Before Trigger", $time);
->e1;
Wait (e2.triggered ());
$display ("@%0t:1: After Trigger", $time);
End

Initial begin
$display ("@%0t:2: Before Trigger", $time);
->e2;
Wait (e1.triggered ());
$display ("@%0t:2: After Trigger", $time);
End

Results:

# @ 0:1: Before trigger
# @ 0:2: Before trigger
# @ 0:2: After trigger
# @ 0:1: After trigger

Reason: Wait () is level sensitive

How to use event in SystemVerilog