Information Security System Design Foundation Sixth Week study summary

Lab five the fourth Chapter processor architecture

This chapter focuses on the 4.1-4.3

Key Exercises: 4.1 4.2 4.5 4.6 4.8 4.10 4.11 4.12 4.16 4.17 4.19 4.21 4.24

The main contents of this chapter are: Processor structure, various logic gates, functional units, instruction set, instruction execution, instruction execution line

The first step is to define a simple instruction set as a running example of our processor implementation. Inspired by the IA32 instruction set, he is popularly known as x86, the Y86 instruction set. The Y86 instruction set has fewer data types, instructions, and addresses than IA32.

Each instruction in the Y86 program reads or modifies portions of the processor state, known as the programmer's visible state

The processor state of the Y86 is similar to IA32. There are eight program registers:%eax%ebx%ecx%edx%esi%edi%esp%ebp. Each program register of the processor stores one word. The register%esp is pushed into the stack, out of the stack, called and returned as a stack pointer. In other cases, the register does not have a fixed meaning or fixed value. There are three one-bit condition codes: ZF SF of, they save the relevant information about the impact of recent arithmetic or logic directives. Program counter (PC) holds the address of the currently executing instruction

Memory: Conceptually, it is a large byte array, preserving the program and data. The Y86 program uses a virtual address to refer to the memory location. Hardware and operating system software combine to translate virtual addresses into actual or physical addresses, indicating where the data is actually stored in memory

About Y86:

1.ia32 's MOVL instruction is divided into 4 different instructions: IRMOVL,RRMOVL,MRMOVL,RMMOVL, explicitly naming the source and the destination format respectively. The source can be an immediate number (i) register (r) or memory (m). The first letter of the instruction name indicates the type of the source. The purpose can be register (r) or memory (m). The second letter of the instruction name indicates the purpose type

2. There are 4 integer operation instructions ADDL,SUBL,ANDL,XORL

3.7 Jump Commands Jmp,jle,jl,je,jne,jge,jg

4.6 Conditional Delivery Instructions CMOVLE,CMOVL,CMOVE,CMOVNE,CMOVGE,CMOVG

The 5.call instruction returns the address to the stack and then jumps to the destination address. The RET instruction returns from such a procedure call

The 6.PUSHL and POPL instructions are implemented into the stack and out of the stack

Execution of the 7.halt instruction stop command

An important property of the instruction set is that the byte encoding must have a unique interpretation

Value	Name	Meaning
1	AOK	Normal operation
2	HLT	Processor execution Halt instructions
3	Adr	Illegal address encountered
4	Ins	Encounter illegal instructions

Y86 Status code (in our design, any code other than AOK will stop the processor)

For Y86, when these exceptions are encountered, we simply let the processor stop executing the instructions. In a more complete design, the processor typically calls an exception handler

YIS: Instruction set Simulator, which is designed to simulate the execution of Y86 machine code programs without attempting to emulate the behavior of any specific processor implementation

Most Y86 directives modify the state of the program in a straightforward way, so it is not difficult to define the results that each instruction wants to achieve

The PUSHL instruction will reduce the stack pointer by 4 and write a register value to the memory. Therefore, when the PUSHL%ESP instruction is executed, the behavior of the processor is indeterminate, because the register to be placed on the stack is modified by the same instruction. There are usually two Conventions (1) to press into%ESP's original value (2) to press into the value of the%esp minus 4.

The POPL%ESP directive is similar. The%ESP can be set to a value read from memory, or it can be placed as a stack pointer after 4

	HCL (Hardware control language) expressions	C language
and	&&	&
OR	||	|
Not	!	~

The sign of the C language is not used because the logical gate operates only on the number of individual bits, not the entire word

Suppose we want to design a logic circuit to find the minimum value in a set of characters A,b,c, using the HCL to express is:

int Min3 =[

A <= B && a <= c:a;

b <= A && b <= c:b;

1:C;

];

Two types of memory devices: Clock registers, random access memory

Processing an instruction consists of a number of operations (six basic stages that can be organized into the calculations required to implement all Y86 directives):

1. Take the finger

2. Decoding

3. Implementation

4. Visit

5. Write back

6. Update your PC

The processor never needs to read the state updated by the instruction in order to complete the execution of an instruction.

Information Security System Design Foundation Sixth Week study summary