Chapter III Machine-level representation of the program
3.1 View of the history
X86 addressing mode through three generations:
1 The flat mode of the DOS era, not distinguishing between user space and kernel space, very insecure
2-8086 segmented mode
3 IA32 Flat mode with protected mode
3.2 Program code
Instruction set Architecture (ISA): the interface between computer hardware and the underlying software, which is a property that programmers need to know to make a binary machine language program work properly.
Includes: Register organization, instruction set, organization and addressing mode of memory, interrupt mechanism, I/O system structure, definition and transformation of machine working state, data type and representation, protection mechanism.
Instruction format:
Types of ISA:
Stack type, accumulator type, register-memory type, register-register type.
Assembly code does not differentiate between unsigned integers and different types of pointers
PC Register: The program counter (known as a PC in IA32) indicates the address of the next instruction that will be executed in memory.
is a 16-bit program counter, which does not belong to a special function register. Specifically used to address program memory during CPU fetch instructions.
Gcc-s xxx.c-o xxx.s Get assembly code, you can also use objdump-d XXX disassembly; Note that the first two and the last two assembly code, all functions have, build function call stack frame, should understand, memorize.
Note: The 64-bit machine wants to get 32 code: Gcc-m32-s XXX.C6
There is no objdump in MAC OS, there is a basic equivalent command otool
Ubuntu gcc-s code.c (without-o1) produces code closer to the code in the textbook (delete ".") The beginning of the statement)
3.3 Data formats
There are three variants of the data transfer instruction: Movb,movw,moul.
3.4 Access Information
Operand: Immediate count, register, memory.
Effective address calculation imm (eb,ei,s) = Imm + R[eb] + r[ei]*s
Stack: "Advanced after out" push into the stack, pop out of the stack.
3.5 Arithmetic and logical operation
Leal: Load the valid address, note that the source operation is the first one, the purpose operand is the second one.
The rest of the instructions have been practiced in the previous chapter.
3.6 Control
Condition Code:
Jump instruction JP
3.7 Process
The register%EBP is the frame pointer, and the%ESP is the stack pointer.
Call and Leave,ret support procedure calls are returned.
Problems encountered:
The order of the target operand and the source operand in the textbook is different from the IBM-PC assembly language of the last semester.
Resources:
Baidu Library.
IBM-PC assembly language Programming.
Information Security System Design Foundation Fourth Week study summary