Information Security System Design Foundation Sixth Week study summary

Sixth chapter. Memory hierarchy

First, storage technology

1. Three common storage technologies: Ram/rom/Disk

1. Ram:

RAM has SRAM and DRAM.

(1) SRAM:

(SRAM is used as a cache memory, either on the CPU chip or under the chip.) ）

SRAM stores each bit in a bistable memory unit, each of which is implemented using a six-transistor circuit.

Circuit Properties:

Dual stability characteristics.

Can be maintained indefinitely in one of two different voltage configurations or states, and any other state is unstable. (a pendulum resembling a reversal)

(2) DRAM:

DRAM stores each bit as a charge to a capacitor.

Unlike SRAM, a DRAM memory cell is very sensitive to interference, and when the voltage of the capacitor is disturbed, it will never recover.

The traditional DRAM:

The units (BITS) in a DRAM chip are divided into D-units. For specific examples of incoming and outgoing chip information, see P384.

Memory Modules:

The DRAM chip is packaged in a memory module and is plugged into the expansion slot on the motherboard.

168-pin Dual inline Memory module

72-pin single inline memory module

Enhanced DRAM:

Fast-page mode dram, extended data output dram, synchronous dram, double data rate synchronous DRAM, Rambus dram, video dram.

(3) Comparison of SRAM and DRAM:

See P384 form.

3. Non-volatile Memory:

Even after power off, they still keep their information.

Some types in ROM can be read or written.

Rom with prom (programmable ROM), EPROM (erasable programmable ROM), EEPROM (electronic erasable Prom), Flash (flash memory)

Programs stored in ROM devices are often referred to as firmware.

4. Accessing main memory:

The data flows back and forth between the processor and the DRAM main memory via a shared electronic circuit called a bus.

Bus things. (Read and write things)

Read things from main memory data to the CPU, write things from the CPU to the main memory.

Figure 6-7 to understand.

5. Disk storage

(1) Disk Construction:

See P390 for specific figures

Consisting of platters, tracks, sectors, clearances, cylinders; disk drives

(2) disk capacity:

Disk capacity is determined by the following technical factors:

Record density (bits per inch), track density (channel/inch), surface density (bits per square inch)

The formula for calculating disk capacity is described in P391.

(3) Access time:

Disks read and write data in sector-sized chunks, and access time for sectors has three main parts:

Seek time, rotation time, transfer time

The average rotation time is half the maximum rotational delay.

Average time = Average seek time + average rotation delay + average transfer time

Pay attention to doing P393 exercises.

(4) Logical Disk BLOCK:

Memory can be considered a byte array, and the disk can be considered a block array.

(5) Bus:

System bus, storage bus, I/O bus (P395 diagram understanding)

Second, the local nature

1. Locality principle: Programs tend to refer to data items that are adjacent to other recently referenced data items or to the data item itself that has recently been referenced.

1. Two different forms of locality:

Temporal locality (the memory location is referenced once again), spatial locality (a memory location is referenced next to the adjacent memory location)

1. Programs that have good locality run faster than programs with poor local performance.

1. Locality of the reference to the program data:

(1) A reference pattern with a step size of 1:

A function that accesses each element of a vector sequentially, also known as a sequential reference pattern.

(2) Reference mode with a step length of K:

A continuous vector that is accessed every k element.

(3) The reference mode of step 1 is a common and important source of program space limitation.

As the step size increases, the spatial locality decreases.

(4) A double-layered nested loop reads the elements of the group in the order of the row precedence. Has a good spatial locality.

5. The locality of the take command:

Because the program instructions are stored in the memory, the CPU must take out (read out) These instructions, so we can also evaluate a program about the locality of the command.

Three, memory hierarchy structure

1. The basic properties of hardware and software complement each other perfectly.

1. Memory hierarchy: A method of organizing memory systems, all of which are used in modern computer systems.
2. Generally, the storage device becomes slower, cheaper, and larger from the top to the bottom.

P405 Chart

1. System View (1+1>2)

Extrapolate: Symmetric asymmetric encryption forms a hybrid encryption system, hybrid car .....

1. Central:

Each tier of storage devices is the next level of "cache." That is, for each k, a faster and smaller storage device located on the K-tier as the larger of the k+1 layer

Cache for slower storage devices.

(Understanding of the P408 table memory hierarchy concept)

1. Caching in the memory hierarchy

(1) General concept:

The memory of the K+1 layer is divided into successive data object slices, called blocks;

Similarly, the memory of the nth layer is divided into smaller chunks, each of which is the same size as the block of the k+1 layer. At any moment,

The cache of the K-tier contains a copy of a subset of the K+1 layer block;

The data is always copied back and forth between the K-level and the k+1 layer in block size for the transfer unit.

(2) Cache hit:

When a program needs a data object D in the k+1 layer, it first looks for D in a block currently stored in the K layer, if D is just caching

In the K-tier, that's what we call Cache hits.

(3) Cache misses:

On the other hand, if there is no cache data Object D in layer K, then we are talking about cache misses.

Kinds:

Mandatory misses (cold misses), conflict misses, capacity misses

Four, cache memory

1. Cache structure (S,E,B,M):

Cache groups, cache lines, block P409 graphs

(1) The cache is an array of cache groups, each containing one or more rows, each containing a valid bit, some marker bits, and a block of data;

(2) The structure of the cache divides the M address bits into T-markers, S-group index bits and B-block shifts;

1. Direct Map Cache:

Only one row per group (e=1) of cache is called direct mapping cache.

Group selection, row matching, word selection

1. Group-linked cache:

Each group is saved with more than one cache line.

1. Fully-connected cache:

is made up of a group that contains all the cache rows (that is, e=c/b).

1. Cache Management
2. Performance impact

Problems encountered in learning:

Question one, the number of tracks and the number of cylinders in a disk is generally the same relationship? Because in the exercise, they are replaced directly with each other.

Problem two, the simple way to estimate disk access time is to take the seek time by 2, but in exercise 6.3, so that the results of 16ms and the actual result 10ms difference is very large?

Harvest and experience:

This time the homework is completed the longest time, spent three days, finally read the book carefully, the exercise. After finishing this, I had a and

Before the feeling of the same, in itself to make up for the previous vacancy, but unexpectedly found that carefully read the textbook to give their own great harvest. The problems that you find are also beginning to be more detailed,

It is not the general idea of a big concept that does not understand. Finally in self-study has a sense of accomplishment in a study, I hope I have been so persistent.

Finish

Information Security System Design Foundation Sixth Week study summary