Key scanning program based on FPGA

Recently in the study of FPGA, I tried to write a button scanning program. Although there is a single-chip microcomputer-based key scanning experience, there are some concepts for the handling of keys.
But the single-chip computer program is usually written in C, but also useful compilation, and FPGA is the use of VHDL or Verilog This hardware description language to write. First use VHDL to write
Control program, at the beginning of a little reaction but came. The use of VHDL programming and written in C language, there will be a great difference in thinking, because C program execution in sequence, and VHDL language
Each process is executed in parallel, which will take into account the timing problem, which is also in line with the actual hardware work process, after all, the functional modules are independent and related.
Back to the problem of key scanning based on FPGA, usually the processing of the keys must be delayed to shake, in order to avoid the key presses caused by mechanical jitter and other factors affecting the correct decision of the key state.
And in addition to scanning to determine whether the button is pressed, but also to scan to determine whether the key is open (otherwise press the button if the time is relatively long, then the program can be mistaken for a number of consecutive presses).
Based on the above analysis, I have compiled a bit of VHDL language written by the scanning code, the program to achieve the key click, double-tap, long-click judgment Processing. (The clock in the program corresponds to 50MHZ, according to the different main clock to the frequency division should be modified accordingly)

----------------------------------------------------------------------------------
Library IEEE;
Use IEEE. Std_logic_1164.all;
Use IEEE. std_logic_unsigned. All;
--Uncomment the following library declaration if using
--arithmetic functions with signed or Unsigned values
--use IEEE. Numeric_std. All;

--Uncomment the following library declaration if instantiating
--Any Xilinx primitives in this code.
--library UniSIM;
--use UniSIM. Vcomponents.all;

Entity key is
Port (key_state:in bit;--button turns,1-> pressed,0-> not pressed
Clk:in std_logic;
Mode1,mode2:out Integer range 0 to 2;
Q:out Integer range 0 to 2
);
End key;
Architecture Behavioral of key is
Signal Cntdiv:std_logic_vector (0 downto);
Signal Key_count,up_key:integer range 0 to 200000;
Signal Twit_count:integer range 0 to 3;--is used to determine whether a double-click state
Signal Flag_state:integer range 0 to 1;--is used to determine if a button is pressed and pressed once or twice in a row

Type State is (Short_key,long_key,twis_key);--no_key,
Signal pr_state:state;
--signal Long_key,twice_key:integer range 0 to 1000;
Begin
Process (CLK)
Begin
if (CLK ' event and CLK = ' 1 ') then
Cntdiv <= cntdiv + ' 1 ';
End If;
End process;
Process (Cntdiv (7), key_state)
Variable Flag1,flag2:integer range 0 to 2;------------different functions for distinguishing between short presses and long presses
------------FLAG1=0/1 = function 1/function 2;
------------FLAG2=0/1 = function 3/function 4;
Begin
if (Cntdiv (7) ' Event and cntdiv (7) = ' 1 ') then
if (key_state = ' 1 ') then
Key_count <= Key_count +1;
Up_key <= 0;
Flag_state <= 1;
Else
if (Key_count > Key_count < 50000) Then
Twit_count <= Twit_count + 1; --to determine whether a long-pressed flag
Key_count <= 0;
elsif (Key_count > 50000) then--------------Long Press
Pr_state <= Long_key;
Key_count <= 0;
Up_key <= 0;
Flag_state <= 0;
--////////////the code you need to add according to your design//////////////////
--The code ......... .....
------------------------------------------------
Else
Key_count <= 0;
End If;
-------Double-click to Up_key the key to the next pressed duration
if (Up_key > Up_key < 50000 and Twit_count = 2) thenpr_state <=twis_key;
Flag_state <= 0;
Up_key <= 0;
Twit_count <= 0;
Flag2: = Flag2 +1;
if (Flag2 = 2) then Flag2: = 0;
End If;
Mode2 <= Flag2;
--////////////the code you need to add according to your design//////////////////
--The code ......... .....
------------------------------------------------
End If;
if (Up_key > 50000 and twit_count = 1) Then--Short press
Pr_state <= Short_key;
Flag_state <= 0;
Up_key <= 0;
Twit_count <= 0;
Flag1: = Flag1 +1;
if (Flag1 = 2) Then Flag1: =0;end if;
--////////////the code you need to add according to your design//////////////////
--The code ......... .....
------------------------------------------------
End If;
if (flag_state = 1) Then
Up_key <= Up_key + 1;
End If;
End If;
End If;
End process;
Process (pr_state)
--variable Flag1,flag2:integer range 0 to 2;
Begin
Case Pr_state is
When short_key = q <= 0;------Short press the return result flag
When long_key = q <= 1;------long press the result flag
When twis_key = q <= 2;------Double-click the result flag
End case;
End process;
End behavioral;

Key scanning program based on FPGA