Knowledge of 13.ARM coprocessor

Knowledge of 13.ARM coprocessor

There is a coprocessor in the processor to assist the processor to complete some of the functions, mainly to facilitate the role.

Co-processor:

The coprocessor is used to perform specific processing tasks, such as: The math coprocessor can control digital processing to reduce the burden on the processor. ARM can support up to 16 coprocessors, where CP15 is the most important one.

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In ARM9, ARM11, cortexa8 and other nuclei, CP15 functions are the same.

In the ARM11 core document see Figure 1-1:

The section gives an overall view of the system control coprocessor. For detail of the registers

in the system control coprocessor, see System Control Processor Registers On page 3-13.

The purpose of the system control coprocessor, CP15, is to control and provide status

Information for the functions implemented in the Arm1176jzf-s processor. The main

Functions of the system control coprocessor are:

? Overall system control and configuration

? Cache Configuration and Management

? tightly-coupled Memory (TCM) configuration and Management

? Memory Management Unit (MMU) configuration and Management

? DMA Control

? System performance monitoring.

The system control coprocessor does not exist in a distinct physical block of logic.

Figure 1-1

From the above know:

The functions of the system control coprocessor are:

1. Overall system control and configuration
2. Cache Configuration and Management
3. Configuration and management of tightly coupled memory (CTM)
4. Configuration and management of the Memory Management Unit (MMU).
5. DMA control
6. System Performance Control.

To be exact, there are 16 groups of coprocessors in the ARM11 nucleus, not 16, and there are many registers in each group, and the main ID register in the C0 group of the ARM11 nucleus.

System Control Processor Registers

This section gives details of the registers in the system control coprocessor. The section

Presents a summary of the registers and detailed descriptions in register order of CRn,

Opcode_1, CRm, opcode_2.

You can access CP15 registers with MRC and MCR instructions:

Mcr{cond} p15,<opcode_1>,<rd>,<crn>,<crm>,<opcode_2>

Mrc{cond} p15,<opcode_1>,<rd>,<crn>,<crm>,<opcode_2>

Register allocation

Table 3-2 on page 3-14 lists the allocation and reset values of the registers of the system control

Coprocessor Where:

? CRn is the register number within CP15

? OP1 is the Opcode_1 value for the Register

? CRm is the operational register

? OP2 is the opcode_2 value for the register.

? Type applies to the Secure, S, or the non-secure, NS, World and is:

-B, registers banked in Secure and non-secure worlds. If The registers is not banked

Then they is common to both worlds or only accessible in one world.

-na, no access

- RO , read-only access

-ro, read-only access in privileged modes only

- r/w , Read/write access

-R/W, Read/write access in privileged modes only

- WO , write-only access

-wo, write-only access in privileged modes only

-X, Access depends on another register or external signal.

The parameters of the Main ID register:

From the main ID register of the C0 group above, there are 32 bits, and the 32 bits are divided into 5 address segments. For example [15:4] The address segment is a processor that indicates that this is ARM11. The value here is 0xb76

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Before the knowledge saw, control CP15 coprocessor, mainly set the corresponding register to achieve control. This is followed by a description of how to access the Coprocessor's registers and implement the settings.

Mainly through two commands to achieve the MCR and Mrc:r represents register ordinary register, C represents the coprocessor coprocessor.

In the MCR command, M indicates that MOVE,C represents coprocessor,r for register. So the MCR means to move the contents of the ordinary register register to the coprocessor C.

In the MCR command, M indicates that MOVE,C represents coprocessor,r for register. So the MRC means to move the contents of the coprocessor C into the normal register register.

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Format of the instruction:

You can access CP15 registers with MRC and MCR instructions:

Mcr{cond} p15,<opcode_1>,<rd>,<crn>,<crm>,<opcode_2>

Mrc{cond} p15,<opcode_1>,<rd>,<crn>,<crm>,<opcode_2>

Above is the CP15 access format, cp14-cp0 the same.

The values for each parameter are given in the table above:

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See the main ID register in the C0 group, and in the setting MRC, read the contents of the main ID register to the R1 register:

From know:

1. of the CRN=C0:C0 group
2. Op1=0
3. Crm=c0
4. Op2=0
5. RD=R1: Just read the main ID to the R0 register.

This is set up. Next experiment accesses the main ID:

Read the main ID instruction:

MRC p15,0,r1,c0,c0,0

Operation Result:

The value read is 0x410fb766, which is consistent with the values in the description of our nuclear handbook. Description Read success:

In [31:24]=0x41,[23:20]=0x0,[19:16]=0xf,[15:4]=0xb76, the last four bits [3:0] is the revision bit, is between 0x0 to 0x7, here is 6, is also right. So read it out correctly.

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Above is the read operation of the main ID in CP15.

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The next step is to write the data into the control register:

The control register to the C1 group writes the value of the R1 register:

MCR p15,0,r1,c1,c0,0

When it runs, the value of R1 is written in.

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Knowledge of 13.ARM coprocessor