LPC1768 USB Usage--macro definition

#ifndef __usbreg_h

#define __usbreg_h

/* USB device Interrupt definition usb_devintst usb_devinten usb_devintclr usb_devintdet*/

#define FRAME_INT 0x00000001//Every 1MS to generate a frame interrupt, which is used in the transmission of the synchronization packet

#define EP_FAST_INT 0x00000002//endpoints, set the endpoint priority level in the endpoint interrupt priority

#define EP_SLOW_INT 0x00000004//endpoint with slow interrupt, set endpoint priority in endpoint interrupt priority

Trigger when #define DEV_STAT_INT 0x00000008//USB interrupt reset hangs or changes connection

#define CCEMTY_INT 0x00000010//Command code register is empty when the interrupt indicates that the write command has been executed

#define CDFULL_INT 0x00000020//Command data register is full and can now read data

#define RXENDPKT_INT 0x00000040//The current packet in the endpoint buffer has been transmitted to the CPU

#define TXENDPKT_INT 0x00000080//packet length passed into the endpoint buffer is equal to the specified maximum length, the endpoint is full

#define EP_RLZED_INT 0x00000100//end point is used to complete the setup when setting the selection endpoint or the maximum length of the device, set the position

#define ERR_INT 0x00000200//usb any bus error interrupts

/* USB data transfer Length related */

#define PKT_LNGTH_MASK 0X000003FF//Receive packet length and mask to send packet length settings Usb_rxplen Usb_txplen

#define PKT_DV 0x00000400//USB accepts packet data effectively in the transmission process, especially in the synchronization endpoint Usb_rxplen

#define Pkt_rdy 0x00000800//USB Receive package indicates the length is valid and can be read at any time (in the case of using PKT_DV) Usb_rxplen

/* USB control Byte definition Usb_ctrl */

#define CTRL_RD_EN 0x00000001//USB read mode control requires reading data from USB

#define CTRL_WR_EN 0x00000002//usb write mode control, you need to write data to the USB endpoint, automatic zeroing when read and write completed

#define CTRL_LOG_ENDPOINT_MASK (0x0f<<2)//2-5 bit

/* command usb_cmd_code for USB command register 8-15 bit 02 for read 01 for write 05 for pure command */

#define CMD_SET_ADDR 0x00d00500//Set device address 0-6 for address 7 for device enable 1 device enable 0 device to not respond to the package of its own address

#define CMD_CFG_DEV 0x00d80500//Configure the device to respond to all of the enabled non-control endpoints (important)

#define CMD_SET_MODE 0x00f30500//Setup mode includes the clock input endpoint output endpoint Ack for the batch endpoint

#define CMD_RD_FRAME 0x00f50500//Frame number

#define DAT_RD_FRAME 0x00f50200//Read frame number

#define CMD_RD_TEST 0x00fd0500//test Register

#define DAT_RD_TEST 0x00fd0200//Read the test register, and if USB_CLK is running, it will return 0xa50f

#define CMD_SET_DEV_STAT 0x00fe0500//Set device status including USB connection UAB hang or USB bus reset

#define CMD_GET_DEV_STAT 0x00fe0500//Get device status

#define DAT_GET_DEV_STAT 0x00fe0200//Read device status

#define Cmd_get_err_code 0x00ff0500//Get error code

#define DAT_GET_ERR_CODE 0x00ff0200//Read error code data low four bit is error code 0x0000 no error

#define CMD_RD_ERR_STAT 0x00fb0500//Read error status including CRC error PID error filling error etc USB bus error

#define DAT_RD_ERR_STAT 0x00fb0200//Read error status

#define DAT_WR_BYTE (x) (0x00000100 | ((x) << 16))//write data to the USB command data register because only 16-23 bits are valid

#define CMD_SEL_EP (x) (0x00000500 | ((x) <<)//USB Select Endpoint

#define DAT_SEL_EP (x) (0x00000200 | ((x) << 16))//Select endpoint to get endpoint status endpoint empty or other

#define CMD_SEL_EP_CLRI (x) (0x00400500 | ((x) <<))//USB Select endpoint/Clear Interrupt

#define DAT_SEL_EP_CLRI (x) (0x00400200 | ((x) <<))//usb Set endpoint status (endpoint enable, endpoint pause rate feedback, etc.)

#define CMD_SET_EP_STAT (x) (0x00400500 | ((x) << 16))//

#define CMD_CLR_BUF 0x00f20500

#define DAT_CLR_BUF 0x00f20200//usb Clear the endpoint buffer

#define CMD_VALID_BUF 0x00fa0500//ACK buffer, when the command is sent, tells the endpoint when the next in packet to send the endpoint buffer data to the host

/* Device Address set 0-6 for address 7 for device enable 1 device enable 0 device does not respond to the package of its own address */

#define Dev_addr_mask 0x7F

#define DEV_EN 0x80

/* Device configures all enabled non-control endpoints to respond */

#define Conf_dvice 0x01

/* Data definition for the SET mode command */

#define AP_CLK 0x01//Can turn off the 48M clock in the suspended state

#define INAK_CI 0x02//control in endpoint NAK interrupt 0 Data processing returns NAK interrupt 1 after successful completion

#define INAK_CO 0x04//Nak interrupt for control out endpoint

#define INAK_II 0x08//Interrupt in Endpoint Nak interrupt

#define INAK_IO 0x10//A NAK interrupt for an out endpoint

NAK Interrupt #define INAK_BI 0x20//Bulk in NAK Endpoint

NAK Interrupt #define INAK_BO 0x40//Bulk out Endpoint

/* SET command data definition for device status */

#define DEV_CON 0x01//0 Connect critical low 1 connect pin high

#define DEV_CON_CH 0x02//connection has changed

#define DEV_SUS 0x04//device is suspended

#define DEV_SUS_CH 0x08//device hangs bit changed

#define DEV_RST 0x10//device received a bus reset

/* Error code data definition */

#define ERR_EC_MASK 0x0F//Error code mask

#define ERR_EA 0x10//error code currently present

/* Specific definition of error status */

#define ERR_PID 0x01//pid encoding Error

#define ERR_UEPKT 0x02//Unexpected packets

#define ERR_DCRC 0x04//Data CRC error

#define ERR_TIMOUT 0x08//Timeout error

#define ERR_EOP 0x10//Packet End Error

#define ERR_B_OVRN 0x20//Buffer Overflow

#define ERR_BTSTF 0x40//bit fill error

#define ERR_TGL 0x80//error reversal bit in data pid

/* Endpoint information returned by the end selection Register */

#define EP_SEL_F 0x01//in endpoint empty or out endpoint full

#define EP_SEL_ST 0x02//Paused endpoint Indicator

#define EP_SEL_STP 0x04//Selected endpoint last accepted to the setup package

#define EP_SEL_PO 0x08//prior to receiving package overwritten by Setup package

#define EP_SEL_EPN 0x10//device send Nack

#define EP_SEL_B_1_FULL 0x20//buffer 1 status 1 full 0 empty

#define EP_SEL_B_2_FULL 0x40//Buffer 2 status

/* Endpoint Status bit settings */

#define EP_STAT_ST 0x01//Set endpoint paused (Received setup package, endpoint automatically paused)

#define EP_STAT_DA 0x20//Set endpoint Enable

#define EP_STAT_RF_MO 0x40//Interrupt endpoint is in rate feedback mode

#define EP_STAT_CND_ST 0x80//End condition Pause bit

/* The state that can be read when emptying the endpoint */

Data packets received #define CLR_BUF_PO 0x01//before being overwritten by the setup package

/* DMA Interrupt bit definition */

#define EOT_INT 0x01//DMA transmit end interrupt bit

#define NDD_REQ_INT 0x02//DMA DD request interrupt bit

#define SYS_ERR_INT 0x04//DMA system error Interrupt bit

#endif

LPC1768 USB Usage--macro definition