msm8916 LCD related Tuning Pilot guide

Source: Internet
Author: User

Main code:
Linux\android\kernel\arch\arm\boot\dts\qcom\dsi-panel-trust-hx8379c-fwvga-video.dtsi
Linux\android\kernel\arch\arm\boot\dts\qcom\msm8916-qrd-skum.dtsi
Linux/android/bootable/bootloader/lk/dev/pmic/pm8x41/pm8x41_adc.c
Linux/android/bootable/bootloader/lk/dev/pmic/pm8x41/include/pm8x41_adc.h
Linux/android/bootable/bootloader/lk/target/msm8916/include/target/display.h
Linux/android/bootable/bootloader/lk/target/msm8916/init.c
Linux\android\bootable\bootloader\lk\dev\gcdb\display\include\panel_trust_hx8379c_fwvga_video.h
\\192.168.142.144\chenhaibing\MSM8916_R113502NEW\LINUX\android\bootable\bootloader\lk\target\msm8916\oem_ Panel.c


1.Lk:

ADC compatible

Android/bootable/bootloader/lk/dev/pmic/pm8x41/include/pm8x41_adc.h

#defineMPP_2_CHAN_ID 33//chenhaibing 20140925 to define the appropriate ADC channel
VOIDPM8X41_ENABLE_MPP_AS_ADC_FOR_MPP2 (uint16_tmpp_num);//chenhaibing 20140925 add for LCM ADC

Android/bootable/bootloader/lk/dev/pmic/pm8x41/pm8x41_adc.c
Static struct adc_conf adc_data[]={chan_init (vadc_usr1_base,vadc_bat_chan_id,vadc_mode_normal,vadc_decim_ratio_ Val,hw_set_delay_100us,fast_avg_samp_1,calib_ratio), Chan_init (Vadc_usr1_base,vadc_bat_vol_chan_id,vadc_mode_ Normal,vadc_decim_ratio_val,hw_set_delay_100us,fast_avg_samp_1,calib_abs), Chan_init (VADC_USR1_BASE, MPP_2_CHAN_ Id,vadc_mode_normal,vadc_decim_ratio_val,hw_set_dela
Y_100us,fast_avg_samp_1,calib_abs),
Add to Adc_data Initialize array
Before you can read the ADC data, you need to enable this interface
/*begin:add by Chenhaibing for pm8x41 mpp2 ADC enable 20140925*/
VOIDPM8X41_ENABLE_MPP_AS_ADC_FOR_MPP2 (Uint16_tmpp_num)
{uint32_tval;
if (Mpp_num >mpp_max_num)
{dprintf (CRITICAL, "error:the MPP pin number is unavailable\n");
return;}
/* Set the MPP mode as AIN */
val = (mpp_mode_ain <<q_reg_mode_sel_shift) \ | (0x1<<q_reg_out_invert_shift) \ | (0x0<<q_reg_src_sel_shift);
Reg_write ((mpp_reg_base +mpp_num *mpp_reg_range +q_reg_mode_ctl), Val);
/* Enable the MPP */
val = (mpp_master_enable <<q_reg_master_en_shift);
Reg_write ((mpp_reg_base +mpp_num *mpp_reg_range +q_reg_en_ctl), Val);
/* AIN route to AMUX8 */
val = (0x1<<q_reg_ain_route_shift);//amux1
Reg_write ((mpp_reg_base +mpp_num *mpp_reg_range +q_reg_ain_ctl), Val);
}
Android/bootable/bootloader/lk/target/msm8916/oem_panel.c
#include "include/panel_trust_hx8379c_fwvga_video.h"//chenhaibing add 0923


Main interface:
Oem_panel_select: Mainly based on the ADC to determine the LCD compatibility
PM8X41_ENABLE_MPP_AS_ADC_FOR_MPP2 (0x01);
Lcm_type =GET_VENDOR_FROM_ADC (mpp_2_chan_id);
if (Lcm_type_hs==lcm_type)
{
panel_id =ili9806e_fwvga_video_panel;//chenhaibing Add
}
ElseIf (Lcm_type_ts==lcm_type)
{
PANEL_ID =hx8379c_fwvga_video_panel;
}
Else
{
PANEL_ID =unknown_panel;
RET =false;
Return ret;
}
OEM_PANEL_ON is responsible for putting. h-related macros and instructions, timing settings, etc., according to Oem_panel_select: The structure used by the specified panel_id to drive the screen.

Kernel article.


The Panel ID is passed to the kernel layer by command line, and the kernel video MDSS driver is accessed by invoking DTSi related node information, making the LCM normally driven.
DTSi Related node information:
Timing settings:
Qcom,mdss-dsi-panel-timings = [4D 1 A, 1E 14 03 04 00];

80-nh713-1_dsi_timing_parameters_user_interactive_spreadsheet.xlsm
DSI and MDP Registers sheet page writes the following information:
Frame rate, Lane config,pixel format bpp,active width,active Height
Hsync Pulse Width,hori. Back Porch,hori. Front Porch,vsync Pulse Width,vert. Back Porch,vert. Front Porch

Copy the values below to fill in the above array.
2. DSI PHY Registers
PHY Registersvalue in hex
dsiphy_timing_ctrl_0#value!
dsiphy_timing_ctrl_11a
dsiphy_timing_ctrl_212
Dsiphy_timing_ctrl_3 0
dsiphy_timing_ctrl_440
dsiphy_timing_ctrl_542
dsiphy_timing_ctrl_616
dsiphy_timing_ctrl_71e
dsiphy_timing_ctrl_814
dsiphy_timing_ctrl_93
dsiphy_timing_ctrl_104


Esd:

Qcom,mdss-dsi-panel-status-command = [06 01 00 01 05 00 02 09 08];
Qcom,mdss-dsi-panel-status-command-state = "Dsi_lp_mode";
Qcom,mdss-dsi-panel-status-check-mode = "Reg_read";
Qcom,mdss-dsi-panel-status-value = <0x90>;
qcom,esd-check-enabled;

Like what:


If you need to return multiple parameters, you need to rewrite the code:
Mdss_dsi_host.c
static int mdss_dsi_read_status (struct mdss_dsi_ctrl_pdata *ctrl)
{
struct Dcs_cmd_req cmdreq;

memset (&cmdreq, 0, sizeof (cmdreq));
Cmdreq.cmds = ctrl->status_cmds.cmds;
cmdreq.cmds_cnt = ctrl->status_cmds.cmd_cnt;
Cmdreq.flags = Cmd_req_commit | Cmd_clk_ctrl | CMD_REQ_RX;
Cmdreq.rlen = 0;
CMDREQ.CB = NULL;
Cmdreq.rbuf = ctrl->status_buf.data;

Return Mdss_dsi_cmdlist_put (CTRL, &CMDREQ);
}


/*begin:add by chenhaibing for hx8379c read status 20141021*/
static int mdss_dsi_read_status_for_trust (struct mdss_dsi_ctrl_pdata *ctrl)
{
struct Dcs_cmd_req cmdreq;

memset (&cmdreq, 0, sizeof (cmdreq));
Cmdreq.cmds = ctrl->status_cmds.cmds;
cmdreq.cmds_cnt = ctrl->status_cmds.cmd_cnt;
Cmdreq.flags = Cmd_req_commit | Cmd_clk_ctrl | CMD_REQ_RX;
Cmdreq.rlen = 4; Modified 4 This sends a 37 instruction, specifying that 4 parameters are returned.
CMDREQ.CB = NULL;
Cmdreq.rbuf = ctrl->status_buf.data;

Return Mdss_dsi_cmdlist_put (CTRL, &CMDREQ);
}

/*end:add by chenhaibing for hx8379c read status 20141021*/


Mdss_dsi_reg_status_check Add relevant military custom judgment logic.

Power issues encountered while msm8916 debugging Himax 8379C:

Cause Analysis:

Volume test power-on or wake-up waveform, because this IC can not enter the Ulps mode, msm8916 the default source code does not open ulps. This results in the actual test wave satisfies the IC spec does not match.

Cause screen leakage.

The solution is configured under DTSI nodes.

Qcom,mdss-dsi-lp11-init; When the reset signal is pulled down, clock and data are pulled up in time and some IC timings are required.

qcom,suspend-ulps-enabled;

Once the above node is open, it also requires a high-pass release-related patch in order to eventually resolve the issue.

Custom Start Logo method


How to customize Splash image
Ntroduction and Background:

For LK display (boot loader) logo, there is and methods:
A) Read the splash image data from splash.h file.
b) Get The splash image data from Splash Partition.

Solution Statement:

For a), please see the below source codes:

Bootable/bootloader/lk/platform/msm_shared/include/splash.h
Bootable/bootloader/lk/dev/fbcon/fbcon.c

When Fbimg is NULL, the LK display data gets from imagebuffer_rgb888 arrays. Please see the below snippet codes.

void Display_image_on_screen ()
{
struct Fbimage default_fbimg, *fbimg;
BOOL flag = TRUE;

Fbcon_clear ();
Fbimg = Fetch_image_from_partition (); Splash image from partition

if (!fbimg) {
Flag = false;
Fbimg = &default_fbimg;
Fbimg->header.width = Splash_image_height;
Fbimg->header.height = Splash_image_width;
#if Display_type_mipi
Fbimg->image = (unsigned char *) imagebuffer_rgb888;
#else
Fbimg->image = (unsigned char *) Imagebuffer;
#endif
}

Fbcon_putimage (fbimg, flag);
}

For b), the steps to generate the splash.img:

1). Install the python on Linux desktop OS.
sudo apt-get install python-imaging

2). Prepare the logo picture with the PNG format in "Device/qcom/common/display/logo" folder, such as "Test.png".
Python./logo_gen.py test.png

3). ADD splash partition on your partition.xml, such as
<partition label= "Splash" size_in_kb= "10240" type= "20117f86-e985-4357-b9ee-374bc1d8487d" bootable= "false" Readonly= "false" Filename= ""/>

4). Check if has "splash.img", and then flash splash image to your device.
FastBoot Flash Splash Splash.img


The second type: Python./logo_gen.py test.png (MSM8916 platform does not see logo_gen.py), FLASH.IMG4).
Check if has "splash.img", and then flash splash image to your device.

msm8916 LCD related Tuning Pilot guide

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