Before designing a multi-layer PCB, the designer must first meet the requirements of the circuit scale, circuit board size, and EMC.
Determine the structure of the circuit board, that is, the four-layer, six-layer, or more layers of the circuit board. After determining the number of layers
Determine the location of the inner electrical layer and how different signals are distributed on these layers. This is the choice of multilayer PCB stack structure. Layer
Stack structure is an important factor affecting pcb emc performance and an important means to suppress electromagnetic interference. This section describes more
Layer-4 PCB stack structure.
11.1.1 how to select and stack Layers
Many factors need to be considered to determine the stack structure of multilayer PCB. In terms of wiring, the more layers, the more favorable the wiring, but
The cost and difficulty will also increase. For the manufacturer, whether the stacked structure is symmetric or not is the focus of PCB Board manufacturing, so
To achieve the optimal balance, you must consider the needs of various layers.
For experienced designers, after completing the pre-layout of components, the PCB wiring bottleneck will be analyzed. Combined
His EDA tool analyzes the wiring density of the circuit board, and then combines the number of signal lines with special wiring requirements, such as differential lines and sensitive signal lines, and
Type to determine the number of layers of the signal layer, and then determine the number of inner electrical layers according to the power supply type, isolation and anti-interference requirements. In this way
The number of PCB layers is basically determined.
After the layers of the circuit board are determined, the next step is to arrange the placement order of each layer circuit reasonably. In this step, consider
There are two main factors.
(1) distribution of special signal layers.
(2) distribution of power supply layers and strata.
The more layers the circuit board has, the more types of special signal layer, ground layer, and power layer are arranged and combined. How can we determine which combination?
The more difficult the method is, the following are the general principles.
(1) The signal layer should be adjacent to an inner electrical layer (internal power supply/formation), and the large copper film of the inner electrical layer should be used to shield the signal layer.
(2) The internal power supply layer should be closely coupled with the formation, that is, the thickness of the medium between the internal power supply layer and the formation should be small.
To increase the capacitance between the power supply layer and the formation, and increase the resonance frequency. The thickness of the media between the internal power supply layer and the formation can be
Set in the layer stack manager of PROTEL. Select Design or layer stack.
Manager ...] Command to display the stack Manager dialog box. Double-click the prepreg text to display the dialog box 11-1. In the dialog box, you can change the thickness of the insulation layer in the thickness option. If the potential difference between the power supply and the ground wire is small, a smaller insulating layer thickness can be used, for example, 5mil (0.127 ).
(3) The high-speed signal transmission layer in the circuit should be the signal intermediate layer and be clamped between two inner electrical layers. The copper film of two inner electrical Layers
It can provide Electromagnetic Shielding for high-speed signal transmission, and effectively limit the radiation of High-speed signals between two inner electrical layers.
Cause interference.
(4) avoid two signal layers directly adjacent. Crosstalk is easily introduced between adjacent signal layers, resulting in circuit function failure. In two signals
Adding layers to the ground plane can effectively avoid crosstalk.
(5) Multiple grounding inner electrical layers can effectively reduce the Grounding Impedance. For example, the signal Layer A and the signal layer B use their respective ground planes,
This can effectively reduce common-mode interference.
(6) consider the symmetry of the layer structure.
11.1.2 common cascade Structures
The following example shows how to optimize the arrangement and combination of various laminated structures.
For Commonly Used 4-layer panels, there are several cascade methods (from top layer to bottom layer ).
(1) siganl_1 (top), Gnd (inner_1), power (inner_2), siganl_2 (bottom ).
(2) siganl_1 (top), power (inner_1), Gnd (inner_2), siganl_2 (bottom ).
(3) power (top), siganl_1 (inner_1), Gnd (inner_2), siganl_2 (bottom ).
Obviously, the power supply layer and formation in solution 3 are not effectively coupled and should not be used.
So how should solution 1 and solution 2 be selected? Generally, the designer selects solution 1 as the 4-layer structure. The reason is not that solution 2 cannot be used, but that General PCB boards are only placed on the top layer of components, so solution 1 is more appropriate. However
When the components must be placed on the top and bottom layers, and the thickness of the medium between the internal power supply layer and the formation is large and the coupling is not good
Which layer has fewer signal lines to consider. For solution 1, there are few signal lines at the bottom layer, and a large area of copper film can be used.
Coupling with the power layer; otherwise, if the components are mainly arranged at the bottom layer, choose solution 2 to make the board.
If the stacked structure shown in 11-1 is used, the power supply layer and the ground layer are coupled. Considering the requirements of symmetry
Solution 1.
After completing the stacked Structure Analysis of the 4-layer laminate, the following uses an example of a 6-layer laminate combination to illustrate the arrangement and combination of the 6-layer laminated structure.
Method and optimization method.
(1) siganl_1 (top), Gnd (inner_1), siganl_2 (inner_2), siganl_3 (inner_3), power (in
).
Solution 1 uses a layer-4 signal layer and a layer-2 internal power supply/access layer, and has a large number of signal layers, which is conducive to wiring between components,
The defects of this solution are also obvious, as shown in the following two aspects.
① The power supply layer and the ground layer are separated far from each other and are not fully coupled.
② The signal layer siganl_2 (inner_2) and siganl_3 (inner_3) are directly adjacent to each other. The signal isolation is poor and Crosstalk is prone.
(2) siganl_1 (top), siganl_2 (inner_1), power (inner_2), Gnd (inner_3), siganl_3 (in
).
Compared with solution 1, solution 2 has full coupling between the power supply layer and the ground layer, which has some advantages over solution 1, but siganl_1 (top)
It is directly adjacent to the signal layers of siganl_2 (inner_1), siganl_3 (inner_4), and siganl_4 (bottom). The signal isolation is not
Well, the problem of crosstalk is not solved.
(3) siganl_1 (top), Gnd (inner_1), siganl_2 (inner_2), power (inner_3), Gnd (inner _
).
Compared with solution 1 and solution 2, solution 3 reduces a signal layer and an inner electrical layer. Although the layers available for cabling are reduced
This solution solves the Common Defects in solution 1 and solution 2.
① The power supply layer is closely coupled with the ground layer.
② Each signal layer is directly adjacent to the inner electrical layer, which is effectively isolated from other signal layers and is not prone to crosstalk.
③ Siganl_2 (inner_2) is adjacent to two inner electrical layers Gnd (inner_1) and power (inner_3), which can be used to transmit high-speed
Signal. The two inner electrical layers can effectively shield external interference on the siganl_2 (inner_2) layer and
.
In all aspects, solution 3 is obviously the most optimal one. At the same time, solution 3 is also a commonly used stack structure of 6 layers.
Through the analysis of the above two examples, I believe that the reader has a certain understanding of the stacked structure, but sometimes, a certain Solution
All requirements cannot be met, so the priority of the design principles needs to be considered. Unfortunately
The Board layer design of the circuit board is closely related to the characteristics of the actual circuit. The anti-interference performance and design focus of different circuits are different.
In fact, these principles do not have a specific priority for reference. But it can be determined that the design principle 2 (between the internal power supply layer and the Formation
Must be tightly coupled) must be met first during design. In addition, if the high-speed signal needs to be transmitted in the circuit, the design principle 3 (Electrical
The high-speed signal transmission layer in the path must be the signal intermediate layer and be clamped between two inner electrical layers. Table 11-1 provides
Multi-layer laminated structure for your reference. 11.2.1 General Principles of component Layout
The general principles that designers need to follow in the PCB layout process are as follows.
(1) it is best to place the components on one side. If you need to place components on both sides, place pin components on the bottom layer,
It may cause the circuit board to be difficult to be placed, and it is not conducive to welding. Therefore, it is best to place only SMD components at the bottom layer,
Similar to the layout of components on PCB of computer graphics card. When placed on one side, you only need to prepare a Silk Screen Layer on one side of the circuit board.
To reduce costs.
(2) Reasonably arrange the location and direction of interface components. Generally, it is used as a connection between the circuit board and the outside (Power Supply and signal line ).
Device components are usually arranged at the edge of the circuit board, such as the serial port and parallel port. If it is placed in the center of the circuit board, it is obviously not conducive to wiring
Other components may be unable to connect. In addition, pay attention to the interface direction when placing the interface, so that the connection line can be smoothly
To the circuit board. After the interface is placed, the interface type should be clearly indicated by the string (string) of the interface component.
Class; for power interfaces, voltage levels should be indicated to prevent circuit board burning due to wiring errors.
(3) it is best to have a wide electrical isolation band between high-voltage components and low-voltage components. That is to say, do not make the voltage level very different
The components are placed together, which is conducive to electrical insulation and provides great benefits for signal isolation and anti-interference.
(4) components with close electrical connection should be put together. This is the idea of modular layout.
(5) For components that are easy to generate noise, such as high-frequency components such as clock generators and crystal oscillator, place them whenever possible
Set it to the clock input end close to the CPU. Large Current circuits and Switching circuits are also prone to noise.
It should also be far away from high-speed signal circuits such as logical control circuits and storage circuits. If possible, use the control panel and Power Board
To improve the overall anti-interference capability and operational reliability of the circuit board.
(6) try to place the decoupling capacitor and filter capacitor around the power supply and chip. The layout of the decoupling capacitor and the filtering capacitor is to improve the circuit board power supply.
Quality is an important measure to improve anti-interference capabilities. In practical applications, cabling, pin connections, and wiring of printed circuit boards are all possible.
A large parasitic inductance is generated, resulting in high-frequency ripple and glitch in the power supply waveform and signal waveform.
A 0.1 f decoupling capacitor can effectively filter out these high-frequency ripple and glitch. If the Board uses a SMD capacitor, paste it
The chip capacitor is close to the power pin of the component. For power conversion chips or power input, it is best to set a 10 f or larger
To further improve the power quality.
(7) the number of the component should be placed close to the frame of the component. The size should be uniform and the direction should be neat. It should not be consistent with that of the component, through holes or pad weight.
Stacked. The 1st pin of the component or plug-in indicates the direction. The positive and negative signs should be marked on the PCB and cannot be covered.
For components (such as DC/DC converter, linear conversion power supply and switching power supply), there should be sufficient space for heat dissipation and installation, leaving the peripheral
Sufficient welding space. 11.2.2 general principle of component Wiring
The general principles that designers need to follow during circuit board cabling are as follows.
(1) how to set the padding of printed cabling for components. The spacing constraints between different networks are caused by electrical insulation, manufacturing process, and large components.
Small. For example, if the pin spacing of a chip component is 8 mil, the [clearance constraint] of the chip cannot be set.
If this parameter is set to 10mil, the designer must separately set a 6mil design rule for the chip. At the same time, the spacing settings must take into account the Production Plant
Production Capability of the home.
In addition, an important factor affecting components is electrical insulation. If the potential difference between the two components or the network is large, you need to consider electrical
Insulation Problems. The gap Safe voltage in the general environment is 200 V/mm, that is, 5.08 V/mil. Therefore, when the same circuit board has a high
When the pressure circuit has a low-voltage circuit, you need to pay special attention to enough safe spacing.
(2) Select the line form at the corner. In order to make the circuit board easy to manufacture and beautiful, you must set the line corner mode during design,
You can select 45 °, 90 °, and arc. Generally, do not use sharp corners. It is best to use arc transition or 45 ° transition to avoid 90 ° or more.
Sharp Corner transition.
The connection between the wire and the pad should be as smooth as possible to avoid the appearance of small sharp feet, you can use the method of filling the tears to solve. When soldering pad
When the center distance is less than the outer diameter D of a pad, the width of the wire can be the same as the diameter of the pad; if the center distance between the pad is large
In D, the width of the wire should not be greater than the diameter of the pad.
When the wires are not connected through two pad, they should be kept at the maximum and equal spacing, the same between the wire and wire
The spacing should be even and equal, and keep the maximum.
(3) how to determine the printing line width. The strip width is determined by the current level and anti-interference factors flowing through the wire.
The larger the value, the wider the cabling. Generally, the power cord is wider than the signal cable. To ensure the stability of the ground potential
), The ground line should be wider. The experiment shows that when the copper film thickness of the printed wire is
When the value is 05mm, the load of printed wires can be calculated according to 20a/mm2, that is, 05mm thick, 1mm wide wires can flow
The current passing through 1A. So for the average signal line, 10 ~ The width of 30mil can meet the requirements; high voltage, high current signal
The line width is equal to or equal to 40 mil, and the spacing between lines is greater than 30 mil. To ensure the Strip strength and reliability of the wire
Within the permitted range, the wire as wide as possible should be used to reduce the line impedance and improve the anti-interference performance.
For the width of the power cord and ground wire, in order to ensure the stability of the waveform, when the circuit board wiring space permits, try to bold, General situation
At least 50 mil is required.
(4) anti-interference and electromagnetic shielding of printed wires. Interference on the wire mainly includes interference introduced between wires, interference introduced by the power cord and
Crosstalk between signal lines, reasonable arrangement and arrangement of cabling and grounding modes can effectively reduce interference sources, so that the designed circuit board has more
Good electromagnetic compatibility.
For high-frequency or other important signal lines, such as the clock signal line, on the one hand, the line should be as wide as possible, on the other hand, you can take packets
The form of ground to isolate it from the surrounding signal line (that is, to wrap the signal line with a closed ground line, it is equivalent to adding a Layer
Shielding layer ).
The analog and digital locations must be separately cabled and cannot be mixed. If we need to finally unify the analog field and number into a potential
One grounding method should be adopted, that is, only one point should be selected to connect the simulated ground to the digital ground to prevent the formation of the ground ring, resulting in Potential offset.
After the wiring is completed, a large-area grounding copper film, also known as copper coating, should be applied to the top and bottom layers without laying wires, to effectively reduce
Ground impedance, which weakens the high-frequency signal in the ground. At the same time, large-area grounding can suppress electromagnetic interference.
A passing hole in the circuit board will bring about 10 pf parasitic capacitance, which is especially harmful to High-Speed Circuits. At the same time, too many passing holes will also
Reduces the mechanical strength of the circuit board. Therefore, the number of holes should be reduced as much as possible during cabling. In addition
Holes are usually replaced by pad. This is because when making a circuit board, it may be due to processing reasons that lead to some penetrating
The hole (through hole) is not worn, and the pad must be worn during processing, which is equivalent to bringing convenience to production.
The above is the general principle of PCB layout and wiring, but in actual operation, the layout and wiring of components are still very flexible.
The layout and connection modes of components are not unique. The result of layout and wiring depends largely on the experience and
Train of Thought. It can be said that there is no standard to judge the right and wrong of the layout and wiring scheme, and it can only be relatively superior and inferior. So the above Layout
Bureau and wiring principles are only used as design references. practice is the only criterion for judging the merits and demerits.
11.2.3 Special requirements for multilayer PCB layout and wiring
Compared with simple single and double layers, multilayer PCB layout and wiring have their own unique requirements.
The layout of multi-layer PCB is to arrange the layout of components of different power supply and ground types reasonably. The purpose is
It facilitates the division of the inner electrical layer and effectively improves the anti-interference capability between components.
The so-called rational arrangement of the use of different power supply and ground components layout, is to use the same power level and the same type of components do
Together. For example, when the circuit schematic has more than 3.3 V, + 5 V, −5 V, + 15 V, −15 V, and so on, the designer
Components that use the same voltage level should be placed in a certain area of the circuit board. Of course, this layout principle is not the only
A standard, while also taking into account other layout principles (the general principle of dual-board layout), this requires the design personnel according to the actual needs
Based on other layout principles, components of the same power supply level and type should be used whenever possible.
Put together. For the multi-layer PCB board wiring, It is summarized as one point: the first signal line, followed by the power line. This is because of the multilayer
Power Supply and location are usually achieved by connecting the inner electrical layer. This can simplify the cabling of the signal layer and
Large-area copper film connection to effectively reduce the Grounding Impedance and power equivalent internal resistance, improve the anti-interference ability of the circuit; at the same time, large-area Copper
The maximum current allowed by the membrane also increases.
Under normal circumstances, the designer must first arrange the layout of components of different power supply and ground types, while taking into account the layout of other original
Then, wiring the components (wiring only the signal line) according to the method described in the previous chapter, divide the inner electrical layer, and determine the inner electrical
The Network labels of each part of the layer are connected through the inner electrical layer and through the through holes and pad on the signal layer. Pad and pass through the inner electrical layer
Welding pad or pass holes with the same network label will be connected to the inner electrical layer through some non-corrosive copper films, and does not belong to the network
The copper film around the pad will be completely corroded, that is, it will not be turned on with the inner electric layer.
11.3 create and set intermediate layers
The middle layer is the layer between the top and bottom layers of the PCB Board. For the structure, see Figure 11-1. You can refer to the annotations in the figure for understanding.
How is the middle layer implemented in the production process? Simply put, a multi-layer board is formed by compressing multiple single and double layers. The middle layer
It is the top or bottom layer of the original single and double layers. In the PCB production process, you first need to use a base material (generally
The two sides of the synthetic resin material are coated with copper film, and then the wire connection relationship in the drawing is converted to the sheet of the printed board through optical painting and other techniques.
(Protection of printed wires, pad, and pass-through film in the drawings to prevent the copper films of these parts from being corrupted in the subsequent corrosion process
Corrosion), and then through the chemical corrosion method (with FeCl3 or hydrogen peroxide as the main component of the corrosion liquid) will not be covered to protect part of the copper film Corrosion Finally, complete drilling, printing Silk Screen Layer and other post-processing work, so that a PCB is basically completed. Likewise, many
The layer PCB is to press multiple layers into a circuit board by pressing the process, and in order to reduce costs and
Interference, multi-layer PCB Board is often not more than the double-layer and single-layer thickness, which makes the Board layer of the multi-layer PCB Board relative to the ordinary double layer
Plates and single-layer panels tend to have lower thickness and lower mechanical strength, resulting in higher processing requirements. Therefore, compared
Ordinary double and single layers are much more expensive.
However, due to the existence of the middle layer, multi-board cabling becomes easier, which is also the main purpose of Multi-board selection. However, in practical application
Multi-layer PCB Board puts forward higher requirements for manual wiring, so that designers need to get more help from EDA software.
The existence of inter-layer enables the power supply and signal to be transmitted in different board layers. The signal isolation and anti-interference performance are better, and the large area
Copper-coated power supply and local network can effectively reduce the line impedance and the potential offset caused by the joint grounding. Therefore, many
The PCB Board of the laminate structure has better anti-interference performance than the ordinary double or single laminate.
11.3.1 create an intermediate layer
The Protel system provides a dedicated layer stack manager ). This tool can
Help designers add, modify, and delete work layers, and define and modify layer attributes. Select Design or layer stack.
Manager ...] Command to bring up the layer stack manager attribute Setting Dialog Box shown in 11-2. Shows a layer-4 PCB stack Manager interface. In addition to the top layer (toplayer) and bottom layer (bottomlayer,
There are also two internal power layers And Gnd. The positions of these layers are clearly displayed in the figure. Double-click layer name
Or click the Properties button to bring up the layer property Setting dialog box, as shown in Figure 11-3. The dialog box contains three options.
(1) Name: Specifies the name of the layer.
(2) copper thickness: Specifies the copper film thickness of the layer. The default value is 1.4mil. The thicker the copper film, the wires of the same width can bear
The larger the load traffic.
(3) Net Name: Specify the network connected to this layer in the drop-down list. This option can only be used to set the inner electrical layer. This option is not selected for the signal layer.
. If the inner electrical layer only has one network such as "+ 5 V", you can specify the network name here. However, if the inner electrical layer needs to be divided
If it is partitioned into several different regions, do not specify the network name here.
There is also insulation material between the layers as the carrier of the circuit board or for electrical isolation. Both core and prepreg are insulating materials,
The core is the dual-sides of the plate with copper film and connections, and The prepreg is only used for interlayer isolation of insulating material. Attribute settings
The dialog box is the same. Double-click core or preg, or select insulation material and click Properties.
Dialog box. As shown in Figure 11-4.
The thickness of the insulation layer is related to factors such as interlayer Withstand Voltage and signal coupling. The layers selection and superposition principles have been described in the previous section. If no
If you have special requirements, select the default value.
In addition to the core and preg insulation layers, the top and bottom layers of the circuit board usually have insulation layers. Click the upper left corner of Figure 11-2.
Select whether to display the insulation layer in the selection box before top dielectric (top insulation layer) or bottom dielectric (bottom Insulation Layer,
Click the button next to it to set the properties of the insulation layer.
There is a stack mode selection drop-down list under the options of the top and bottom layers, you can select a different stack mode: Layer
Pairs, internal layer pairs, and build-up ). As mentioned above, the multi-layer board is actually
The top layer is formed by pressing multiple double or single layers. If different modes are selected, different suppression methods are used in actual production.
The locations of the "core" and "prepreg" shown in 11-5 are also different. For example, the layer pair mode is that two double-layer panels have one insulation layer.
(Prepreg), the paired mode of the inner electrical layer is that two single-layer panels are clamped with one dual-layer. The default layer pairs (layer pair) mode is usually used.
. In the layer stack manager attribute Setting Dialog Box shown in Figure 11-2, there is a column-layer operation button on the right. The functions of each button are as follows.
(1) Add layer: add an intermediate signal layer. For example, to add a high-speed signal layer between Gnd and power, you must first
Select the Gnd layer, as shown in Figure 11-6. Click the add layer button to add a signal layer under the Gnd layer, as shown in 11-7,
The default names are midlayer1, midlayer2, and so on. Double-click the layer name or click Properties to set
Layer properties. (2) Add plane: add an inner electrical layer. The method for adding an intermediate signal layer is the same as that for adding an intermediate signal layer. First select the location of the inner electrical layer to be added.
Click this button to add the inner electrical layer under the specified layer. The default name is internal plane1, internalplane2
This type of push. Double-click the layer name or click Properties to set the layer properties. (3) Delete: delete a layer. Except the top layer and bottom layer, other signal and inner electrical layers can be deleted,
The intermediate signal layer and the split inner electrical layer cannot be deleted. Select the layer to be deleted, and click this button, as shown in figure
In the dialog box shown in Figure 11-8, click yes to delete the layer.
(4) Move Up: Move a layer up. Select the layer to be moved up (either the signal layer or the inner electrical layer) and click this button,
The layer will be moved to the top layer, but it will not exceed the top layer.
(5) Move Down: move down a layer. Similar to the move up button, if you click this button, the layer moves down a layer but does not exceed
Bottom layer.
(6) properties: Properties button. Click this button to bring up the layer attribute Settings dialog box similar to figure 11-3.
11.3.2 intermediate layer settings
After completing the settings of the layer stack manager, click OK to exit the layer stack manager.
. When operating on the middle layer, you must first set whether the middle layer is displayed on the PCB editing interface. Select
[Design]/[OPTIONS ...] Command, the option Setting Dialog Box shown in 11-9 is displayed.
Check the layer option to display the inner electrical layer. After completing the settings, you can see the displayed layers at the bottom of the PCB editing environment, as shown in 11-10. Click the board with the mouse
Layer labels can be used to switch between different layers for operations. If you are not used to the default color, you can select
[Tools]/[preferences ...] You can use the colors option under the command to customize the color of each layer. For more information, see Chapter 8th.
For more information. 11.4 Design of inner electrical layer
One of the most important advantages of a Multi-board over a common double or single-board is that the signal lines and power supplies can be distributed on different board layers,
Improve signal isolation and anti-interference performance. The inner electrical layer is a copper layer, which is divided into several isolated areas, each zone
The copper film of the domain is connected to a specific power supply or ground wire through a passing hole, which simplifies the wiring of the power supply and the ground network and effectively reduces the power supply.
.
11.4.1 internal electrical layer design settings
The inner electrical layer is usually the whole copper film. When the pad with the same network name as the copper film passes through the inner electrical layer, the system will automatically
Connect. The connection form between pad/pass-through and inner electrical layer, as well as the safe distance between the copper film and other pad that do not belong to the network.
Set in the power plane clearance option. Select [design]/[rules ...] Command, click the manufacturing option
The power plane clearance and power plane connect style options in are related to the inner electrical layer. The content is described as follows.
1. Power plane clearance
This rule is used to set the safe spacing of the inner electrical layer. It mainly refers to the security room between the Solder Pad and the inner electrical layer that are not connected to the network.
Distance, as shown in 11-11. During Manufacturing, when the pad without network connection with the inner electrical layer passes through the inner electrical layer, the copper film around it
The dimension of the corroded ring is the value set in the constraint. 2. Power plane connect Style
This rule is used to set the form of the pad and the inner electrical layer. It mainly refers to the welding pad with network connection with the inner electrical layer and when the inner electrical layer is connected through holes
Format. 11-12. Click properties to bring up the rule setting dialog box, as shown in 11-13. On the left side of the dialog box, the Rule Applicability
You can select the following connection methods from the rule attributes drop-down list on the right: Relief connect, direct connect, and no.
Connect. Direct Connect is directly connected. When the pad passes through the inner electrical layer, it does not corrode the surrounding copper film.
The copper film is directly connected; no connect means that the pad with the same name as the copper film network will not be connected to the inner electric layer; designer 1
Generally, the system uses the default relief connect connection mode. The Setting dialog box for this rule is 11-13. This form of pad connection maintains a connection with the inner electrical layer through conductor extension and insulation gap, where the guide is set in the width option of the conductor
Width of the condu; number of conductor egresses selected in the conductors option; 2 or 4 can be selected; export is set in the expansion Option
The width of the extended part of the body. The air-gap option sets the width of the insulation gap. 11.4.2 inner electrical layer Segmentation Method
In the previous sections of this chapter, we have introduced the choice of multilayer structure, the establishment of the inner electrical layer and related settings. In this section, we will mainly
This section describes how to separate the inner electrical layer of a multi-layer board for your reference.
(1) Before dividing the inner electrical layer, you must first define an inner electrical layer. This is already described in the previous chapter. . Select [design]/[split planes ...] Command to bring up the inner electrical layer split dialog box, as shown in 11-14. In this dialog box
The current split planes column of specifies the area where the inner electrical layer has been split. In this example, the inner electrical layer is not split, so as shown in Figure 11-14.
The current split planes column of is blank. The add, edit, and delete buttons in the current split planes column are used to add new
In the power supply area, edit the selected network and delete the selected network. The show selected split plane view option below the button is used to set
Whether to display the current selected inner electrical layer split area. If this option is selected, the inner layer is displayed in the box below it.
A thumbnail of the network area divided by the area. The pins, pad, or connections with the same name as the inner electrical layer network are highlighted in the thumbnail.
If this option is not selected, it is not highlighted. Show net for option. Select this option.
If the network is specified for the inner electrical layer, lines and pins with the same name are displayed in the box above the option.
(2) Click the Add button to bring up the inner electrical layer split Setting dialog box from 11 to 15. In the dialog box shown on November 15, track width is used to set the line width when the border is drawn.
The insulation gap between the network areas, so the track width is usually set relatively large. It is recommended that you enter a single value when entering a value.
Bit. If only a number is entered and no unit is entered, the unit in the current PCB editor is used by default.
The layer option is used to set the specified split inner electrical layer. You can select power And Gnd inner electrical layer. In this example, multiple voltage levels are stored.
Therefore, separate the power inner electrical layer to provide different levels of voltage for components.
The connect to net option is used to specify the network connected to the partitioned area. The inner electrical layer is usually used for power supply and local network layout,
In the connect to net drop-down list, you can see that the entire network in the inner layer can be connected to the signal network for signal transmission,
Generally, this is not the case for designers. The signal voltage and current required by the signal are weak, and the requirement on the wire is small, while the power supply current is large and requires a smaller
Equivalent internal resistance. Therefore, signals are routed at the signal layer. The inner electrical layer is used for power supply and local network connections.
(3) Click the OK button in the inner electric layer split Setting Dialog Box in Figure 11-15 to enter the network area border drawing status.
When drawing the inner electrical layer border, you usually hide the information of other layers and only display the edited inner electrical layer for convenient side
Box. Select Tools and preferences ...] Command to bring up the dialog box shown in 11-16. Select the display option,
Select the single layer mode check box, as shown in Figure 11-16. In this way, all layers except the current working layer power are hidden Hidden, as shown in Figure 11-17. When dividing the inner electrical layer, because the split area includes all the pins and pad of the network, you usually need to know
Distribution of pins and pad with the same name in the power supply network for segmentation. In the left-side browse PCB tool, select VCC network (for example
See Figure 11-18). Click the select button to light up and select the network.
As shown in Figure 11-19, after the VCC network is switched on, the soldering pad with the network label as VCC and the soldering pad with other network labels and
Comparison.
After selecting these network pad with the same name, you can Pad is included in the area. In this case, these power networks can be connected directly through the pad instead of through the signal layer connection.
Electrical layer.
(4) Draw the separate area of the inner electric layer.
Select [design]/[split planes ...] Command to pop up the inner electrical layer split dialog box shown in 11-14, click the Add button
The inner electrical layer split Setting dialog box is displayed from 11 to 15. Select 12 V network, click OK, And the cursor changes to a cross.
The inner electrical layer can be split.
When drawing the border line, you can press SHIFT + Space key to change the corner shape of the line, or press the tab key to change the owner of the inner layer.
. After a closed area is drawn (the start point and the end point overlap), the system automatically displays the inner electrical layer split dialog as shown in 11-20.
In the dialog box, you can see an area that has been split, as shown in 11-21 on the PCB editing page. After adding the inner electrical layer, enlarge a 12 V pad and you can see that the pad is not connected to the wire (11-22 (),
However, a "+" icon appears on the pad, indicating that the pad has been connected to the inner electrical layer.
Switch the current working layer to the power layer, and you can see the connection status of the pad to the inner electrical layer. Because the inner electrical layer is usually the whole copper film
The parts shown around the pad in Figure 11-22 (B) will be corroded during the production process. It can be seen that the Gnd and the inner electrical layer are insulated. After the 12 V area is added to the inner power layer, you can also add other networks as needed, that is, to divide the entire inner power layer into several
In different isolated areas, each area is connected to a different power supply network. The final result is 11-23.
After dividing the inner electrical layer, You can edit and delete the inner electrical layer network in the dialog box shown in 11-20. Single
Click the edit button to bring up the inner electrical layer attribute dialog box shown in 11-15. In this dialog box, you can modify the boundary width and inner electrical layer.
But the shape of the border cannot be modified. If you are not satisfied with the border direction and shape, you can only click the delete button,
Re-draw the boundary, or select the [edit]/[Move]/[split plane vertices] command to modify the boundary of the inner electrical layer.
The boundary shape is changed by moving the control points on the boundary, as shown in 11-24. Click Yes in the displayed dialog box
Button to complete the re-painting. After the 12 V area is added to the inner power layer, you can also add other networks as needed, that is, to divide the entire inner power layer into several
In different isolated areas, each area is connected to a different power supply network. The final result is 11-23.
After dividing the inner electrical layer, You can edit and delete the inner electrical layer network in the dialog box shown in 11-20. Single
Click the edit button to bring up the inner electrical layer attribute dialog box shown in 11-15. In this dialog box, you can modify the boundary width and inner electrical layer.
But the shape of the border cannot be modified. If you are not satisfied with the border direction and shape, you can only click the delete button,
Re-draw the boundary, or select the [edit]/[Move]/[split plane vertices] command to modify the boundary of the inner electrical layer.
The boundary shape is changed by moving the control points on the boundary, as shown in 11-24. Click Yes in the displayed dialog box
Button to complete the re-painting. An error occurred. Therefore, when designing a PCB, try to ensure that the border does not pass through a pad with the same network name. (3) When drawing the boundary of the inner electrical layer, if you cannot include all the pad of the same network due to objective reasons, you can
Connect these pad through signal layer cabling. However, in the practical application of multi-layer panels, we should try to avoid this situation.
Now. Because if the pad is connected to the inner electrical layer by means of signal layer cabling, it is equivalent to putting a large resistance (the signal layer goes through
Wire resistance) and small resistance (internal electrical layer copper film Resistance) in series, and the important advantage of using multi-board is that through a large area of copper film connection
Power Supply and ground to effectively reduce the line impedance, reduce the potential offset caused by PCB grounding resistance, and improve the anti-interference performance. Therefore
In actual design, try to avoid connecting the power network through a wire.
(4) the local network and power supply network are distributed in different inner electrical layers to achieve better electrical isolation and anti-interference effects.
(5) For SMD components, you can place a pad or a hole at the pin to connect to the inner electrical layer, or from the pin
Lead a very short wire (the lead should be as short as possible to reduce the line impedance), and place the pad and the pass hole at the end of the wire
Connection, as shown in Figure 11-27.
(6) Placement of decoupling capacitors. As mentioned above, 0.01 μF decoupling capacitor should be placed near the chip. For power chips,
A 10 f or larger filter capacitor should be placed to filter out the high-frequency interference and ripple in the circuit, and connect the core with the shortest shorter wire.
Pin, and then connect to the inner electrical layer through the pad.
(7) If you do not need to separate the inner electrical layer, you can directly select to connect to the network in the Properties dialog box of the inner electrical layer.
The inner electrical layer segmentation tool. 11.5 Summary of design principles of multi-Laminate
In this chapter and the previous chapters, we have already emphasized some principles that need to be followed for PCB design. Here we will
The principles are summarized for readers to refer to during design, and can also be used as a basis for reference after design inspection.
1. PCB component library requirements
(1) The encapsulation of the components used on the PCB must be correct, including the size and size of the components pins, pin spacing, and pin encoding.
Number, border size, and direction.
(2) Polarity components (electrolytic capacitor, diode, transistor, etc.) Positive and negative poles or PIN numbers should be in the PCB Component Library and on the PCB Board
Mark.
(3) the PIN numbers of the components in the PCB library should be consistent with those of the schematic components. For example, the duji is introduced in the previous chapter.
The pin numbers in the PCB library components are inconsistent with those in the principle library.
(4) components whose heat sink needs to be used should be taken into account the size of the heat sink when drawing components for encapsulation.
The slices are drawn together to form an overall encapsulation.
(5) the pins of the component and the diameter of the pad must match. The diameter of the pad must be slightly larger than the Pin Size of the component for installation.
.
2. PCB Component layout requirements
(1) components are evenly arranged. Components of the same functional module should be arranged as close as possible.
(2) components using the same type of power supply and local network should be arranged together as much as possible, which is conducive to completing electrical connection between each other through the inner electrical layer.
.
(3) The interface components should be placed by the side and the interface type should be indicated with a string. The wiring direction should usually leave the circuit board.
(4) power conversion components (such as transformer, DC/DC converter, and three-end voltage regulator) should have enough space for heat dissipation.
(5) The pin or reference point of the component should be placed on the grid point, which is conducive to wiring and aesthetics.
(6) The filter capacitor can be placed on the back of the chip, close to the power supply and ground pins of the chip.
(7) The first pin of the component or the logo direction should be indicated on the PCB and cannot be covered by the component.
(8) The component label should be close to the component frame, with uniform size and neat direction. It does not overlap with the pad and the pass-through, and cannot be placed in the Yuan
The area covered after the device is installed. 3. PCB cabling requirements
(1) The power supply of different voltage levels should be isolated, and the power supply line should not cross.
(2) A 45 ° corner or an arc corner is used for cabling. a corner with a sharp angle is not allowed.
(3) The PCB is directly connected to the center of the pad. The width of the wire connecting to the pad cannot exceed the outer diameter of the pad.
(4) The line width of the high-frequency signal line is no less than 20 mil. It is enclosed by a ground wire and isolated from other ground wires.
(5) do not wiring the bottom of the interference source (DC/DC converter, crystal oscillator, transformer, etc.) to avoid interference.
(6) use the power cord and ground wire as much as possible. The width of the power cord shall not be less than 50mil if space permits.
(7) low voltage, low current signal line width 9 ~ 30mil, which is as bold as possible when space is allowed.
(8) the spacing between signal lines should be greater than 10mil, and the gap between power lines should be greater than 20mil.
(9) the width of the large current signal line must be greater than 40mil, and the spacing should be greater than 30mil.
(10) The minimum size of the passing hole is 40mil, and the diameter is 28mil. When connecting the top and bottom layers with wires, the pad is preferred.
(11) signal lines cannot be arranged on the inner electrical layer.
(12) The interval width between different areas of the inner electrical layer is not less than 40mil.
(13) Try not to allow the border through the pad of the area to be connected when drawing the border.
(14) copper is laid on the top and bottom layers. We recommend that you set a line width value greater than the grid width to completely cover the free space without any dead copper.
Keep the distance above 30mil (0.762mm) with other lines (you can set the safe distance before applying copper, and change it back to the original security after applying Copper
Full spacing value ).
(15) after the wiring is completed, the solder tray will be treated with tears.
(16) External grounding of metal shell devices and modules.
(17) pad for installation and welding.
(18) Check whether DRC is correct.
4. Requirements for PCB layering
(1) The power supply plane should be close to the ground plane, closely coupled with the ground plane, and arranged below the ground plane.
(2) The signal layer should be adjacent to the inner electrical layer and should not be directly adjacent to other signal layers.
(3) isolate the digital and analog circuits. If conditions permit, the analog and digital signal lines are arranged hierarchically and shielded
Measures; if you need to deploy the same signal layer, you need to use the isolation band, ground line to reduce interference; analog circuit and Digital Circuit
The power supply and the ground should be isolated from each other and cannot be mixed.
(4) the high-frequency circuit has a large degree of external interference. It is best to arrange it separately. It is transmitted using an intermediate signal layer directly adjacent to both the upper and lower power layers.
The copper film of the inner electrical layer is used to reduce external interference.
11.6 summary of this Chapter
This chapter describes the design steps of multilayer circuit boards, including the selection of layers of Multilayer Boards and the selection of laminated structures.
The layout and wiring of common double-layer networks are the same and different. The creation and setting of Multi-Layer Networks and the design of the inner electrical layer are the same. According to this chapter
Readers can complete the preliminary design of multi-layer PCB. In the next chapter, we will introduce the Electromagnetic Properties of PCB.
Compatibility and signal integrity related content for better PCB design. |
