My FPGA Learning History (--FPGA) basic knowledge and Quartus installation

The advanced embedded market is divided into the following three categories: ARM, DSP and FPGA.

ARM is the industry leader, currently almost all Android smartphones use ARM authorized CPU architecture, while DSP (digital signal processor) has been widely used in the early years of the telephone, DVD, communication base Station and other fields. The difference between DSP and arm is that arm is a universal CPU,DSP and a dedicated CPU. FPGA is different from them, the name of the FPGA is due to the FPGA function of the molding is in the laboratory and other normal working environment, the difference with the proprietary integrated circuit (ASIC) manufacturing in the wafer factory, so the FPGA is called a Field programmable gate array.

My Development Board is black Gold AX301, at that time silly thought FPGA must be more than 51 advanced chip, in the product introduction Picture VGA interface, take into account my laptop monitor is not external, in the debugging need an external screen display printing information, so another bought a 7 inch VGA display (- ____-）。

My Development Board looks like this (red Companion downloader, required):

What you need to do after you get to the Development Board:

1. Take a look at the disc data that came with the board, including user manuals, schematics, and more. Familiar with the following information.
2. The second step, Altera official website to register an account, download a Quartus software.
3. Be familiar with the material on CD.
4. Follow the video requirements to open a Quartus project (. QPF end).
5. Install the Usb-blaster drive to the Jtag port on the Development Board and download one (. sof) file to see the effect.
6. Follow the instructions in the PDF tutorial to convert (. sof) file files into (. jic) files and burn them to EPCS.

Quartus has a free version of the network, the difference between the free version and the registered version is as follows:

1. Free version does not have multi-threaded compilation function, if the multi-core CPU, the free version will only use one of the CPU, the compilation speed will be slower.
2. Free version If the IP core is used, the generated burn file (. sof) can only be used online (attached to the computer), and (. pof) can only be used for one hours.
3. Free version in Qsys or sopcbuilder can only use NIOS thin core, or Quartus compile error.

Quartus differences in other versions:

1. 9 ~ 10 version of the default includes the graphics emulation excitation input tool, 10 to 12 version of the deleted it again, but in the version after 13 to add the tool again, if there is no graphical simulation excitation input tool to simulate only by writing Testbench script, Testbench script writing and Mode Lsim's method of operation can be a huge hurdle for beginners.
2. After version 11, Qsys replaces Sopcbuilder for building NIOS processors.
3. The Quartus after version 14 only has support for 64-bit machines, while Modelsim currently has only 32-bit versions. That is, if a user installs a version after 14, the virtualization of the CPU is required to run the Modelsim emulation software.

In general, the free version is sufficient for getting started.

The black Gold community has created a full set of PDF tutorials for the Development Board, and is a rare and lively writing style. Unfortunately for me the nature of the note-taking tutorial is to teach not beginners what, want to read those tutorials require prior experience with hardware practitioners and related knowledge.

In addition, the CD-ROM also comes with Xia Wenyu teacher's "Digital Logic Design" PDF version, this book from a grammatical point of view in detail the Verilog language, but may be due to the book earlier, there is no strict distinction between the comprehensive logic and non-synthetic logic, but also the lack of introduction of experimental methods, The reader does not know what software to use to practice the examples in the book.

At that time on the Internet can not find any introduction video about Verilog, only to buy this "FPGA digital logic Design Tutorial--verilog" as a textbook to bite the bullet. The unexpected is that the foreigner wrote the book really good quality, but the translation is a Xilinx company's FPGA as an example of practice, using ISE as the development environment. This thought some will have some problems, but Verilog language powerful versatility to eliminate the difference between different manufacturers of products; When I try to change the number of switches in the book to constant, to reduce the number of LED lights to less than 4 LED lights as a practice, a year down the introductory study has not been affected.

The English words above may make people feel foggy and difficult to clarify the relationship between them and the difference. Here is a simple comparison of 51 single-chip microcomputer, the introduction of the relevant terms of the FPGA.

Name	Fpga	Fpga	8051
Manufacturing Companies	Altera	Xilinx	Stc
Design Tools	Quartus	Ise	Keil
Language	Verilog HDL, VHDL	Verilog HDL, VHDL	C

At the end of the Quartus installation, Quartus is an Altera product that supports both the Windows and Linux operating systems. The Web version of the download and use is free, anyone can go to the Altera official website to register for download, Baidu Search can also get some download links, here is the assumption that you have downloaded the corresponding version of your machine.

Whether you are downloading a combo package, a standalone file, or a DVD image, you should be able to find some files similar to the following after decompression, although different versions will have some differences:

Double-click Setup.bat or QuartusSetup.exe to start the installation, the installation may appear in the case of suspended animation, this is due to the disk read and write reached the upper limit caused by:

License, whatever he is, (￢^?? ￢☆) Hum.

Installation path selection, do not want to fail to make any changes, the default is in C:\altera\13.0sp1, not in the C:\Program files\altera\13.0sp1. The installation directory does not allow any Chinese, white space or special symbols, and the same is true for engineering catalogs.

Quartus installation option, please tick on the 64-bit machine Quartus II 64-bit Support,modelsim-altera also exists free and paid version.

If you install DSP Builder will have this step, DSP Builder can be combined with MATLAB DSP design, here I do not install MATLAB, the students need to set their own.

Ready to install, here it takes about 9G, showing the partition free 57G.

Patiently wait about 30 minutes, the configuration may be faster, the installation process will be some small pop-up window.

Complete, the three options are: whether to create desktop shortcuts, whether to start the Quartus software immediately, whether to feedback user information.

After loading, if you are prompted not to install the device library, like this:

Click OK or open the device installation tool in the tool menu, note: older versions of Quartus do not have this install Devices option:

Locate the directory where you are storing the device library compression pack (. Qdz):

Select the device library to install, and if there are multiple Qdz files in the directory, more will be shown here.

Successful, Quartus installation is complete. O (^▽^) o

My FPGA Learning History (--FPGA) basic knowledge and Quartus installation