N methods for setting general registers to 0 in Assembler

Method 1

 

MoV eax, 0
MoV EBX, 0
MoV ECx, 0
MoV edX, 0

 

Method 2

 

XOR eax, eax
XOR edX, EDX
XOR ECx, ECx
XOR edX, ECx

 

Method 3

Hmm... yep, here the stall is partially balanced by the non-change of the source argument (a work/branch avoided by the CPU), so in this specific case, the difference is minimized.

 

XOR eax, eax
XOR ECx, ECx
MoV EBX, eax
MoV edX, ECx

 

Technically the "result" stall is slower (but never enough to put a useless instruction! Even a Nop !), There is also possible stall with the source argument (when R + I/R), but not here. so you don't need to change the register in the last line, you will obtain the benefit of a non-changed source (there is no dependency/alteration here ):

 

XOR eax, eax
XOR ECx, ECx
MoV EBX, eax
MoV edX, eax

 

Method 4

Include/masm32/include/masm32rt. inc

. Data?
Null8 dd 8 DUP (?)

. Code

Start:
MoV null8 [12], esp; save Stack pointer in a global variable
MoV ESP, offset null8; put Stack pointer in front of 8 nullwords
Popad
MoV ESP, null8 [12]; restore Stack pointer

Getkey
Exit; short form of invoke exitprocess, 0

End start

 

Method 5

For AMD CPU

 

MoV Al, 99
Cpuid

 

Note:
1. For intel celeon M, EBX, ECx, edX will be set to 0

2. on Intel 64 processors, cpuid clears the high 32 bits of the Rax/RBx/rcX/RDX registers in all modes.
This was info from: Intel 3-180 vol. 2a CPUID-CPU identification.
I think this translate to the high 32 bits of said register are trashed,
Over-written with zeros.

Method 6

Fldz
. XMM
Prefetchnta qword ptr es: [esp-8]
Push CS
Verw word ptr es: [esp]
Pop ECx
Fistp qword ptr es: [esp-8]
Pause
Lock cmpxchg8b qword ptr es: [esp-8]
Cmovne ECx, eax
Cmovnz EBX, ECx

 

Method 7

Sub ESP, 32
MoV EDI, ESP
XOR eax, eax
MoV ECx, 8
Rep stosd
Popad
 
Method 8

Push 32
Pop ECx
Sub ESP, ECx
MoV EDI, ESP
XOR eax, eax
Rep stosb
Popad

 

Method 9

. Data
ZER dd 0, 0, 0, 0, 0, 0, 0, ZER

. Code
Xchg ESP, [ZER + 8*4]
Popad
Pop ESP

00401004 87 25 E4 42 00 xchg ESP, dword ptr ds: [42e4e4h]
0040100a 61 popad
0040100b 5C pop ESP; just 8 bytes

Test code:

Code:
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Include/masm32/include/masm32rt. inc
. 686
Include/masm32/macros/Timers. ASM
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. Data
. Code
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Start:
; [Do not translate «««««««««««««««««««««««««««««««««««««««« [do not translate «««««««««««««««««««««««««««««««««
Invoke sleep, 4000

Counter_begin 1000, high_priority_class
Repe 100
XOR eax, eax
XOR ECx, ECx
MoV EBX, eax
MoV edX, ECx
Endm
Counter_end
Print USTR $ (eax), 13, 10

Counter_begin 1000, high_priority_class
Repe 100
XOR eax, eax
Xor ebx, eax
MoV ECx, eax
MoV edX, eax
Endm
Counter_end
Print USTR $ (eax), 13, 10, 13, 10

Counter_begin 1000, high_priority_class
Repe 100
Add eax, 1
Add ECx, 1
MoV EBX, eax
MoV edX, ECx
Endm
Counter_end
Print USTR $ (eax), 13, 10

Counter_begin 1000, high_priority_class
Repe 100
Add eax, 1
Xor ebx, eax
MoV ECx, eax
MoV edX, eax
Endm
Counter_end
Print USTR $ (eax), 13, 10, 13, 10

Inkey "press any key to exit ..."
Exit

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End start
Running on my P3, I wowould perform CT to see a much larger effect from 100 or more stils:

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The above from the masm32 official forum of wonderful discussion Stickers: http://www.masm32.com/board/index.php? Topic = 11138.15