Operating System Concepts Learning Note 3 storage structure and I/O architecture

Operating System Concepts Learning Note 3 storage structure and I/O structure storage structure

The computer must run in memory or RAM (random access memory), which is the only bulk storage area that the processor can access directly.

The internal registers of memory and the processor itself are the only storage media that the CPU can access directly.

The command load moves the words in memory into registers inside the CPU. The instruction store can move the contents of the register to memory. In addition to explicitly using load and STORE,CPU, the instructions are automatically loaded from memory to execute.

Memory is small and volatile storage devices, so the computer system provides secondary memory as an extension of memory.

For I/O, each I/O controller has registers to report the command and the data to be transferred. Typically, special I/O directives allow data transfer between these registers and system memory. In order to allow more convenient access to these I/O devices, many computer architectures provide memory-mapped I/O, and a block of memory addresses is separated separately and mapped to Device Manager. By reading and writing these memory addresses, the data transfer to the device registers can be achieved.

I/O structure

A general-purpose computer system consists of a CPU and multiple device controllers, which are connected by a common bus. Each device controller is responsible for a specific type of device and can have multiple devices connected to it. The device controller maintains a certain amount of local buffer storage and a certain purpose register. The device controller is responsible for data transfer between the external device it controls and the local cache. Typically, the operating system provides a device driver for each device controller.

To begin the I/O operation, the device driver loads the appropriate registers in the device controller. Accordingly, the device controller checks the contents of these registers to decide what action to take (such as reading a character from the keyboard), the controller begins to transfer data from the device to the local cache, and once the data transfer is complete, the device controller tells the driver that the operation has been completed, and then the driver returns control of the operating system.

Once I/O has begun, there are two possible processes of action. For the simplest case, start I/O, and after I/O is complete, control is returned to the user process, which is known as synchronous I/O. Another possibility, called asynchronous I/O, is to return control to the user program without waiting for I/O to complete. The I/O continues, while the other system operations proceed as usual.

Waiting for I/O completion can take the following: The wait instruction keeps the CPU idle until the next interrupt begins. Wait for the loop.

A better option is to continue executing other operating systems or user program code after I have started I/O. If necessary, the system call will allow the user program to wait for the I/O to complete. If no user program is ready to execute and the operating system has no other work to do, then a wait or idle loop is required and multiple I/O requests can be tracked at the same time, and the operating system uses the device state table.

This I/O interrupt driver is suitable for a small amount of data, DMA (direct memory access) can be used for a large amount of data movement, the device controller can transfer a whole piece of data between local buffer and memory, without CPU intervention, and each block produces only one interrupt instead of one interrupt per byte.

Operating System Concepts Learning Note 3 storage structure and I/O architecture