"Tiny6410 Bare Metal Program" sixth: myled through USB download to Nandflash can not run _ hardware-related

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First, preliminary preparation

1. The Development Board must be in the SD card boot mode.

2. Install USB download driver, install RS232 to USB drive.

3. Install DNS and turn on DNS.

Second, burning write "tiny6410 bare Metal Program" fifth chapter: Assembly and C-mixed programming-led The final description of the horse, myled again streamlined bin to nandflash.

Three, unable to run the reason analysis

1. Previous article Analysis: "MICRO2440 Development" seventh chapter: micro2440 from NAND flash start principle analysis

Because the Nandflash itself cannot run the code (because it is not like the Norflash is randomly stored), the solution to this problem is: the hardware design from the Nandflash start, the CPU will automatically move Nandflash before 4KB to SRAM operation; To access Nandflash, you must first initialize the Nandflash controller, and the workaround is that the 4KB portion of the code must implement Nandflash initialization.

However, there is no problem with this program, because this bin is only 2kb<4kb, there is no code removal problem, there is no need to initialize the Nandflash controller registers.

2. The real reason

Ads debugging MMU is closed, the actual bin MMU did not close. Therefore, add the LED-related GPIO address mapping code can be.

Iv. Methods of Settlement

The top 4KB of the bin must first complete the initialization function of the Nandflash controller register, and set the base and address space of the peripheral IO, or close the MMU and cache.

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After the adaptation program (mainly in the STARTUP.S to add to the CP15 coprocessor operation, set peripheral IO base address and address space, because 6410 of the memory and IO space is separate):

1.startup.s

	Preserve8
	IMPORT	main		declares the main () function area start,code,readonly in the C program, and	declares the code snippet Start
	ENTRY				; Identify the program entry
	CODE32				Statement 32-bit ARM instruction

	LDR r0, =0x70000000      
	Orr r0, R0, #0x13
	mcr p15,0,r0,c15,c2,4     ; 256M ( 0x70000 0000~0x7fff FFFF) arm coprocessor tells the coprocessor the base address and address space of the peripheral registers
  
	Ldr r0, =0x7e004000
	mov r1, #0
	str R1, [R0]              ; close watchdog
	
	Ldr sp, =8*1024           ; set c stack
	BL main

2.led.c

#define LED1_ON ~ (1<<4)//1111 1111 1111 1111 1111 1111 1110 1111 gpkdat31~gpkdat0 #define LED2_ON ~ (1<< 5) #define LED3_ON ~ (1<<6) #define LED4_ON ~ (1<<7) #define Led1_off (1<<4)//0000 0000 0000 0000 0000 0000 0001 0000 #define LED2_OFF (1<<5) #define LED3_OFF (1<<6) #define Led4_off (1<<7) #defin
E Ledall_off (0xf<<4)//0000 0000 0000 0000 0000 0000-1111 typedef 0000 long unsigned;
typedef unsigned short U16;

typedef unsigned char U8; #define RGPIOKCON0 (* (volatile u32 *) 0x7f008800) #define RGPIOKDAT (* volatile u32 *) 0x7f008808) int main (void) {u32 u
  Convalue;
  U32 i;
  Uconvalue = rGPIOKCON0; Uconvalue &= ~ (0xffff<<16);    0000 0000 0000 0000 1111 1111 1111 1111 gpkcon7~gpkcon0 uconvalue |= 0x1111<<16;
  0001 0001 0001 0001 0000 0000 0000 0000 //0001 0001 0001 0001 1111 1111 1111 1111
 rGPIOKCON0 = uConValue;
  Rgpiokdat |= Ledall_off; while (1) {Rgpiokdat &= Led1_on;
    for (i=0;i<3000*100;i++);

    Rgpiokdat |= Ledall_off;
    Rgpiokdat &= led2_on;
    for (i=0;i<3000*100;i++);

    Rgpiokdat |= Ledall_off;
    Rgpiokdat &= led3_on;
    for (i=0;i<3000*100;i++);

    Rgpiokdat |= Ledall_off;
    Rgpiokdat &= led4_on;
    for (i=0;i<3000*100;i++);
  Rgpiokdat |= Ledall_off; }
}

3. The following is a makefile based on the Windows ARMCC compiler

All:	
	armasm-o startup.o startup.s--debug--keep--cpu=arm1176jzf-s armcc-c led.o led.c--debug--cpu=ARM1176JZ
	F-s-o0 armlink-o myled.axf startup.o led.o--ro_base=0x50200000--rw_base=0x50203000---first=Startup.o	
	(start)- entry=0x50200000
	fromelf-o myled.bin--bin myled.axf clean
:	
	del *.o *.axf *.bin

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Add:

U-boot-mini6410/cpu/s3c64xx/start. S

/
         * We do sys-critical inits only in reboot,
         * not if booting from ram!
         *
* Cpu_init_crit
	:
	 * * Flush v4 I/D caches/mov r0,
	#0 mcr P15,	0, R0, C7, C7, 0  /*	flush V3/V4 Cache/
	mcr	p15, 0, R0, C8, C7, 0/

	* Flush TLB/
	 * v4 Disable-MMU and caches
	/MRC	P15, 0, R0, C1, C0, 0
	Bic	r0, R0, #0x00002300	@ clear bits, 9:8 (--v-  --RS)
	Bic	r0, R0, #0x00000087	@ clear bits 7, 2:0 (B----CAM)
	Orr	r0, R0, #0x00000002	@ set Bit 2 (A) Align
	Orr	r0, R0, #0x00001000	@ set bit (I) i-cache mcr P15,	0, R0, C1, C0, 0

	/* Peri Port Setup */
	LDR	r0, =0x70000000
	Orr	r0, R0, #0x13
    	mcr       p15,0,r0,c15,c2,4 @ 256M (0X70000000-0X7FFFFFFF)

Analysis: The program burned to NAND flash or nor flash, in fact, not in the connector specified 0x50200000 in the SDRAM operation, but in the 0x00000000 run, the entire code also embodies the PIC, ARM location-independent code design ideas.