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**(i) a basic concept**

**decibel (db):** a amplitude unit defined by a logarithm. For voltage values, the db is given in 20log (VA/VB) and for the power value, given in 10log (PA/PB). DBC is a DB value relative to a carrier signal, and dbm is a DB value relative to 1mW. For dbm, the load resistor in the specification must be known (for example, 1mW to 50ω) to determine the equivalent voltage or current value.

(ii) **definition of static indicators**

**1. Quantization error (quantization error)**

The quantization error is a basic error and is illustrated with a simple 3bit ADC. The input voltage is digitized, divided by 8 discrete levels, from code 000b to 111b to represent them, each of which crosses the VREF/8 voltage range. The code size is generally defined as a least significant bit (Least significant bit,lsb). If vref=8v is assumed, the voltage transformation between each code represents 1V. In other words, there is an error between the actual voltage that produces the specified code and the voltage that represents it. In general, a 0.5LSB offset added to the input will result in a quantization error of positive and negative 0.5LSB at the ideal transition point.

**2, offset and gain error (offset Gain error)**

The difference between the ideal output of the device and the actual output is defined as the offset error, which is present in all digital codes. In practice, the offset error causes a fixed offset between the transfer function or the analog input voltage and the corresponding value output code. The usual method of calculating the offset error is to measure the voltage of the first digital code conversion or "0" conversion and compare it to the theoretical 0 point voltage. The gain error is the difference between the estimated transfer function and the actual slope, and the gain error is usually computed at the end of the analog-to-digital converter or at the last transfer code conversion point.

In order to find 0 points and the last conversion code point to calculate offset and gain error, you can use a variety of measurement methods, the two most commonly used are the code averaging method and voltage jitter method. The average measurement of the code is to continuously increase the input voltage of the device and then detect the conversion output. Each time you increase the input voltage, you get some conversion code, use the code and work out an average, measure the input voltage that produces these average conversion codes, and calculate the device offset and gain. The voltage Jitter method is similar to the code averaging method, which uses a dynamic feedback loop to control the input voltage of the device, adjusting the input voltage to the difference between the conversion code and the expected code, until the difference between the two codes is zero, and when the expected conversion code approaches the input voltage or changes near the conversion point, the measured "jitter "Voltage mean, calculate offset and gain.

(iii) **dynamic indicator definition**

**1. Number of significant digits (ENOB):** The analog-to-digital converter (ADC) and the input frequency fin-related test indicator (bit). As fin increases, the overall noise (especially the distortion component) increases, thus reducing enob and sinad performance. *other* **Note: The difference between the number of digits and the number of significant digits**

The signal-to-noise ratio of the ideal ADC (which contains only quantization noise) can have a formula:

SNR = (1.76 + 6.02*n) DB

calculated, wherein the noise contains only quantization noise. If the ADC has no other noise and only quantifies the noise, the sample bit n is the same as the number of significant digits Neff.

However, there are some other noise in the actual situation, so the number of bits n calculated by the above formula is the effective bit, it is less than n (number of sample bits), here is the number of samples and the number of significant digits.

That is, the sampling bit n is the processing precision that the ADC can reach only when the quantization error is reached;

The effective number of digits Neff is the processing precision that the ADC can reach in the actual processing.

**2. Resolution:** When the analog signal is quantized, it is represented by a limited discrete voltage level, and the resolution is used to represent the number of discrete levels of the signal. In order to restore the analog signal more accurately, the resolution must be increased. Resolution is usually defined as the number of bits, and the conversion with higher resolution can reduce quantization noise.

**3, RMS:** indicates a valid value or a valid DC value for the AC signal. For a sine wave, the RMS is 0.707 times times the peak value, or 0.354 times times the peak-value.

**4, spurious-free dynamic range (SFDR):** sine wave fin (for the ADC refers to the input sine wave, for ADC/DAC refers to the reconstructed output sine wave) The RMS value of the spurious signal observed in the frequency domain, the typical value is expressed in decibels. SFDR is important in a number of communication systems that require the maximum converter dynamic range.

The spurious-free dynamic range indicates the ability of the analog-to-digital converter to detect the smallest signal at the same time as a large signal, which is also a very important performance parameter in practical applications. The non-spurious dynamic range indicator is an important parameter to mark system performance when the converter is in high oversampling rate or the converter's spectral performance is very important.

**5. Total Harmonic Distortion (THD):** the ratio of the RMS value of the distortion to the RMS value of the input (or output) sine wave at the input (DAC output) Frequency integer multiplier point (harmonic).

**6, signal and noise + distortion ratio (SINAD):** DC to the Nyquist band, Sine wave fin (for the ADC refers to the input sine wave, for ADC/DAC refers to the reconstructed output sine wave) of the RMS value of the converter noise than the RMS value, including the harmonic component.

**7, DBFS (DB full scale):** is a digital signal level unit, referred to as the relative level of saturation. Full scale refers to the position of 0 DBFS, 0 DBFS is the maximum encoding level, different ADC 0 DBFS the actual corresponding value is different, it is the digital peak meter level of reference. The maximum analog signal that the digital signal is capable of processing by the ADC is the maximum value, i.e. 0 DBFS, the ratio of the magnitude of the actual digital signal to the amplitude of the signal encoding of the maximum value, which is the full-scale relative level (DBFS). Because a maximum value of 0 is specified, the full-scale relative level of the signal actually processed by an ADC is negative.

The dBFS of a 12-bit ADC chip:

DBFS = LOG10 (sample signal/1111 1111 1111).

Therefore, Fin = -1dbfs is often seen in the ADC data document, so that the -1DBFS fin in this case is equivalent to 0.8913 of the full scale input amplitude, as calculated from the above formula.

**8. Two-tone IMD (two-tone intermodulation distortion): Two-stage intermodulation distortion**

Two-tone IMD is a harmonic distortion generated at two input signals fin1 and fin2 (fin1-fin2) and (fin1 +fin2) frequency points when the ADC processes a mixed signal of two sine waves.

As shown in the following:

(reproduced) key indicators for high speed ADCs: Quantization error, offset/gain error, DNL, INL, ENOB, resolution, RMS, SFDR, THD, SINAD, DBFS, two-tone IMD