RS485 communication in Xintang cortex-m0

I haven't updated my blog for a long time. Don't think I'm too lazy because I started school, but my study in the New Tang Dynasty is not over. I haven't written a blog for such a long time because I encountered a tangle problem during my learning process. This problem has been nearly three weeks since January 1, September 1, that is, RS485 communication, I would like to write down my own mistakes to avoid detours when I see the article.

If you want to use the 485 communication function, you will definitely refer to the built-in uart_demo sample program. The instances of Xintang can be divided into two types: Register version and API version. If you use APIs to write programs, you will be very pleased, because the sample program is 485, and you only need to change it, but writing a program with the register version is very distressing (I have always used the register version of The Write Program), because it is a common UART communication function, many people will look at the API version and gradually translate it into a register version. However, there are some differences between the two. After two days of in-depth development, I have changed the API version to a register version, what I changed is completely unrecognizable, because my initialization code is almost the same as the API version, but it can run the results, but I cannot. How can this not be difficult?

In the two versions of the New Tang Dynasty, there are two differences:

1. in the API version, the UART clock is an internal 22 MHz crystal oscillator. You must have seen the baud rate function of the crystal oscillator, I only know that I can get the desired crystal oscillator (usually with a 9600 baud rate), and the Register version uses an external 12 MHz crystal oscillator.

2. the second difference is that I have been entangled for three weeks and finally found out. It is also my problem, that is, in the API version, the pin is configured with the rts0 function, the register version does not exist, so even if the subsequent Initialization is very similar to the API, it will also be returned. This is a very important reason! (The rts0 function is automatic direction control, which is used in 485 to control sending and receiving)

After solving these two problems, communication in 485 is basically smooth, but it may be very void. The following is a 485 circuit diagram and the register version code initialized in 485, hope to help everyone, just the code of the New Tang Cortex-M0, if not this chip can look at the steps, it should be no big problem.

 

For example, the circuit diagram of rs85 communication:

 

The following is the code:

 

#define UARTClkSource_in22MHZ   (CLKSEL1 = ((CLKSEL1 & (~UART_CLK)) | UART_22M))

#define UART0_Clock_EN    APBCLK |= UART0_CLKEN   // Enable UART0 clock

Void uart_init (void) {/* Step 1. gpio initial */p3_mfp & = ~ (P31_txd0 | p30_rxd0); p3_mfp | = (txd0 | rxd0); // p3.0 --> uart0 RX // p3.1 --> uart0 TX p0_mfp & = ~ (P03_ad3_rts0 | p02_ad2_cts0); p0_mfp | = (rts0 | cts0); // Terminal 3 ----> rts0 automatic direction control // here is the configuration. I am wrong here, as a result, it is unavailable for 3 weeks,/* Step 2. enable and select UART clock source */uart0_clock_en; // UART clock enable, apbclk [16]: 1 // uartclksource_ex12mhz; // UART clock is ext12mhz, clksel1 [25, 24]: 00 uartclksource_in22mhz; // use the internal 22 MHz crystal clkdiv & = ~ (15 <8); // UART clock Div number = 0;/* Step 3. Select Operation Mode */iprstc2 | = uart0_rst; // reset uart0 iprstc2 & = ~ Uart0_rst; // reset end ua0_fcr | = tx_rst; // tx fifo reset ua0_fcr | = rx_rst; // rx fifo reset ua0_fcr | = rfitl_1; // set to 1 byte to trigger the interruption ua0_lcr & = (~ SPE); ua0_lcr & = (~ EPE); ua0_lcr & = (~ PBE); // parity bit disable check to disable ua0_lcr & = ~ WLS; ua0_lcr | = wl_8bit; // 8 bits data length 8-bit length ua0_lcr & = nsb_one; // 1 stop bit 1-bit stop bit/* Step 4. set baudrate to 115200 * // ua0_baud | = div_x_en; // mode2: div_x_en = 1 // ua0_baud | = div_x_one; // mode2: div_x_one = 1 // above is the baud rate setting with 12 m Crystal Oscillator

// The following describes how to set the baud rate of a 22 m crystal oscillator.

    UA0_BAUD &= (~(1<<29));//    UA0_BAUD |= (1<< 29);   //Mode2:DIV_X_EN = 1    UA0_BAUD &= (~(1<< 28));        //    UA0_BAUD |= (1<< 28);  //Mode2:DIV_X_ONE =1    

    /* For XTAL = 12 MHz */    //UA0_BAUD |= ((12000000 / 9600) -2);//Set BaudRate to 115200;  UART_CLK/(A+2) = 

                                                //115200, UART_CLK=12MHz

    /*FOr 12MHz*/

    UA0_BAUD |= ( 22118400UL / 9600/16  -2);   

     /* For XTAL = 11.0592 MHz */    //UA0_BAUD |= ((11059200 / 115200) -2); //Set BaudRate to 115200;  

                                             //UART_CLK/(A+2) = 115200, UART_CLK=12MHz}

 
Void initrs485 (void) {ua0_fun_sel = rs485_en; // set it to 485 function ua0_fcr | = (rx_dis); // disable receiver acceptance
Ua0_rs485_csr | = rs485_nmm; // set it to 485 normal operation mode ua0_rs485_csr | = rs485_aud; // set it to control the automatic direction mode
 
/* Enable uart0 interrupt */ua0_ier | = rda_ien; // enable acceptable Data interrupt and ua0_ier | = rls_ien; // enable the interrupt status on the receiver, which is an error interrupt, see the m0 Manual
Nvic_iser | = uart0_int; // nvic_ipr3 | = uart0_pri0; // set priority to 3 (minimum priority )}

Void initrs485 (void) {ua0_fun_sel = rs485_en; // set to 485 function ua0_fcr | = (rx_dis); // disable the receiver from accepting ua0_rs485_csr | = rs485_nmm; // set it to 485 normal operation mode ua0_rs485_csr | = rs485_aud; // set it to control automatic direction mode // ua0_ier | = auto_rts_en; // ua0_fcr | = rts_tri_4; // ua0_mcr | = (lev_rts_h); // you can enable 485 drive/* enable uart0 interrupt */ua0_ier | = rda_ien; // enable acceptable data interruptions and ua0_ier | = rls_ien; // enable nvic_iser in the receiver interrupt status | = uart0_int; // nvic_ipr3 | = uart0_pri0; // set priority to 3 (minimum priority )}