S3C2440 bare metal learning [2]-LCD Driver principle and code analysis [2]

Next let's take a look at the LCD. c file in 2440test.

Static void putpixel (u32 X, u32 y, 2010c) { If (x <scr_xsize & Y <scr_ysize) LCD _buffer [(y)] [(x)] = C; }

It is easy to find that the function of displaying a single pixel on a tft LCD is actually very simple.
It seems that only LCD _buffer [(y)] [(x)] = C is required.
Next, we will analyze how to use this sentence to display a single pixel on the LCD.
Analyze the LCD _init (), that is, the LCD initialization function.

Rlcdcon1 = (LCD _pixclock <8) | (3 <5) | (12 <1 );

Lcdcon1 0x4d000000

# Define LCD _width 240

# Define LCD _height 320

# Define LCD _pixclock 4

# Define LCD _right_margin 36

# Define LCD _left_margin 19

# Define LCD _hsync_len 5

# Define LCD _upper_margin 1

# Define LCD _lower_margin 5

# Define LCD _vsync_len 1

Clkval [17: 8] = 4

TFT: vclk = hclk/[(clkval + 1) * 2] (clkval> = 0)

Mmode [7] = 0

Pnrmode [6: 5] = 11 tft LCD Panel

Bppmode [] = 1100 16bpp for TFT

ENVID [0] = 0 disable

Rlcdcon2 = (LCD _upper_margin <24) | (LCD _height-1) <14) | (LCD _lower_margin <6) | (LCD _vsync_len <0 );

Lcdcon2 0x4d000004

Vbpd = 1
Vbpd (vertical back porch): indicates the number of invalid lines after the vertical synchronization signal at the beginning of an image, corresponding to upper_margin in the driver

Linval = 240-1
Linval: the vertical size of the LCD screen

Vfpd = 5
Vfpd (vertical front porch): indicates the number of invalid lines before the vertical synchronization signal after an image ends, corresponding to lower_margin in the driver

Vspw = 1
Vspw (vertical sync pulse width): indicates the width of the Vertical Synchronous pulse, calculated using the number of lines, corresponding to the vsync_len in the driver

Rlcdcon3 = (LCD _right_margin <19) | (LCD _width-1) <8) | (LCD _left_margin <0 );

Lcdcon3 0x4d000008

Hbpd = 36

Hbpd (horizontal back porch): indicates the number of vclks between the start of the Horizontal synchronization signal and the start of a row of valid data, corresponding to left_margin in the driver

Hozval = 320-1

Hozval: horizontal size of LCD screen

Hfpd = 19

Hfpd (horizontal front Porth): indicates the number of vclks between the end of a row of valid data and the start of the next Horizontal synchronization signal, corresponding to right_margin in the driver

 

Rlcdcon4 = (13 <8) | (LCD _hsync_len <0 );

Lcdcon4 0x4d00000c

Mval = 13

Hspw = 5

(Horizontal sync pulse width): used to indicate the width of the Horizontal synchronization signal. It is calculated using vclk and corresponds to hsync_len in the driver.

# Define LCD _con5 (1 <11) | (1 <9) | (1 <8) | (1 <3) | (1 <0 )) Rlcdcon5 = LCD _con5;

Lcdcon5 0x4d000010

Hwswp = 1 swap enable

Pwren = 1 enable pwren Signal

Invvframe = 1 vframe/vsync pulse polarity inverted select negative pulse

Invvline = 1 vline/hsync pulse polarity inverted select negative pulse

Frm565 = 1 5:6:5 format

Rlcdintmsk | = 3;

Int_frsyn = 1 LCD frame synchronized interrupt masked

Int_ficnt = 1 LCD FIFO interrupt masked

 

Rtconsel & = (~ 7 ); Rtconsel & = ~ (1 <4) | 1 );

Mode_sel = 0 Sync Mode

Res_sel = 0 320x240

Lpc_en = 0 lpc3600 disable

 

Rtpal = 0x0;

Temporary palette register enable bit disable

 

Volatile static unsigned short LCD _buffer [scr_ysize] [scr_xsize]; # Define LCD _addr (u32) LCD _buffer) # Define m5d (N) (n) & 0x1fffff) Rlcdsaddr1 = (LCD _addr> 22) <21) | (m5d (LCD _addr> 1) <0 ); Rlcdsaddr2 = m5d (LCD _addr + LCD _width * LCD _height * 2)> 1 ); Rlcdsaddr3 = LCD _width;

Lcdsaddr1 0x4d000014 frame buffer starting register 1

Lcdbank [29:21] = (u32) LCD _buffer> 22

These bits indicate a [30: 22] of the bank location for the video buffer in the system memory. lcdbank value cannot be changed even when moving the view port. LCD frame buffer shoshould be within aligned 4 MB region, which
Ensures that lcdbank value will not be changed when moving the view port. So, care shocould be taken to use the malloc () function
The bank location at system memory address a [30: 22] is image buffering. The value of lcdbank cannot be changed when the view is moved. The LCD frame buffer should be aligned in the 4 MB area to ensure that the value of lcdbank does not change when the view is moved.

Lcdbaseu [20:0] = (u32) LCD _buffer> 1) & 0x1fffff

For dual-scan LCD: these bits indicate a [21:1] of the Start address of the upper address counter, which is for the Upper Frame Memory of dual scan LCD or the Frame Memory of single scan LCD.
For single-scan LCD: these bits indicate a [21:1] of the Start address of the LCD frame buffer.
Dual-Scan: indicates the starting address of the High-address counter a [2]. It is used for Upper Frame Memory or single-scan Frame Memory of the LCD dual-scan.
Single scan: indicates the starting address of the LCD Frame Buffer A [21:1]

Lcdsaddr2 0x4d000018 frame buffer start register 2

Lcdbasel [20:0] = (LCD _addr + LCD _width * LCD _height * 2)> 1) & 0x1fffff
= (LCD _addr> 1 + LCD _width * LCD _height) & 0x1fffff

For dual-scan LCD: these bits indicate a [21:1] of the Start address of the lower address counter, which is used for the lower frame memory of dual scan LCD.
For single scan LCD: these bits indicate a [21:1] of the end address of the LCD frame buffer.
Lcdbasel = (the frame end address)> 1) + 1
= Lcdbaseu + (pagewidth + offsize) x (lineval + 1)
Dual-Scan: indicates the starting address of the Low-address counter a [21:1]. It is used for the lower frame memory or single-scan Frame Memory of the LCD dual-scan.
Single scan: indicates the end address of the LCD Frame Buffer A [21:1]

Lcdsaddr3 0x4d00001c frame buffer start register 3

Offsize = 0

Pagewidth = 320 virtual screen page width (number of half words) defines the view field width in the frame

At this point, the program has clearly understood how to use LCD _buffer [(y)] [(x)] = C to display a single pixel on the LCD.
After each LCD register is set, the LCD _buffer address is mapped to the lcdbank, lcdbaseu, and lcdbasel, And the stored values of different units in the LCD _buffer (I .e. the pixel color) are changed ), you can make the display at the corresponding position of the LCD.
When using different LCD, you only need to configure lcdconx and lcdsaddrx, create an array, and map the address above.
For vclk calculation, the formula vclk = hclk/[(clkval + 1) * 2] (clkval> = 0) can be used because TFT is configured)
Set flk to 400 MHz, hclk to 100 MHz, clkval to 4, so vlck = 10 MHz