S3C2440 Memory Management Unit MMU learning notes (modifying)

I have learned the memory management unit MMU of S3C2440 over the past few days. I mainly refer to the full manual for Embedded Linux application development. There are two blogs on the Internet, which are also very detailed. However, they are not well understood in the MMU address translation process. Here, I will explain the content in the embedded Linux application development full manual according to my understanding, and add some notes to the image. In case of any errors, please do not give me any further information. I will change it immediately. Thank you.

S3C2440 MMU address conversion process

1) address classification

Arm cpu address translation involves three types of addresses: Virtual Address (va, virtual address), transformed virtual address (MVA, modified virtual address), physical address (Pa, physical address)

When MMU is not started, all components such as CPU core, cache, MMU, and peripherals use physical addresses.

After MMU is started, the CPU core sends a virtual address va. The VA is converted to MVA for cache and MMU usage. Here, MVA is converted to Pa. Finally, PA is used to read the actual device.

1. The CPU core only displays and uses the virtual address va. If the VA corresponds to the physical address Pa, the CPU core does not

2. caches and MMU cannot see va. They use MVA to convert to get pa.

3. The actual devices do not see VA and MVA. They read and write data using the physical address Pa.

MVA is the virtual address seen in other parts except the CPU core. The relationship between VA and MVA is as follows:

If (va <32 m) then

MVA = va | (PID <25)

Else

MVA = va

PID indicates the process ID (obtained by reading C13 of CP15 ).

The purpose of using MVA instead of VA is: when there are overlapping va, the converted MVA address does not overlap, reducing the cost of converting to Pa.

For example, if the two processes 1, 2, and VA are both 0-(32s-1), The MVA values are 0x02000000-0x03ffffff and 0x0400109-0x05ffffff, respectively.

The virtual address is mentioned below. If it is not specified, it refers to MVA.

2) conversion from a virtual address to a physical address

The arm cpu uses a page table for conversion. A page table consists of descriptors (each 4-byte, 32-bit). Each descriptor stores the physical address and access permission corresponding to a virtual address, or the address of the next level page table.

S3C2440 can be converted by section or page. Only the first-level page table is used for segment-based conversion, and two levels of page table are required for page-based conversion: the second-level page table can be divided into a rough page table and a small page table; ing of the second-level page table can map large pages (large page 64kb), small pages (small page 4kb), and small pages (tiny page 1kb) by size ).

For the address conversion graph of S3C2440 (add some items by yourself. If there is any error, please correct me. Thank you)

Note that:

1. A rough page table can only map large pages and small pages. A small page table can map large pages, small pages, and extremely small pages.

2. ttbbase represents the address of the first-level page table. It is generated by splicing the register C2 (called the base address register of the page table) of the coprocessor CP15 with MVA. The base address register of the page table must be 16 K aligned ([31: 14] The base address of the page table, [13: 0] is 0 ).

The base address register structure of the page table is as follows:

3. The first-level page table uses 4096 descriptors to represent 4 GB space. Each descriptor stores the starting address (segment) of the corresponding 1 MB physical space, or the address of the next level page table.

The main process of MMU addressing

First, the [31: 14] bits of the base address register of the page table and the [31: 20] bits of MVA are combined into a 32-bit address with the lower two bits as 0, MMU queries in the first-level page table based on this address. The subsequent steps are different based on the conversion method.

If a segment is converted, MMU queries the segment descriptor in the first-level page table. The [31: 20] bits (base address) of the segment descriptor and the [] bits of MVA form a 32-bit physical address, that is, the PA corresponding to MVA.

If you convert the form of a page (assuming that the second-level page table is a coarse-page table and stores a large-page descriptor), MMU queries the coarse-page table descriptor in the first-level page table. The [31: 10] (that is, the base address of the rough page table) Bit Of the descriptor is taken out, and the [] bit of MVA forms a 32-bit physical address with the lower two digits as 0, this address is used to find the large page descriptor in the second-level page table. Retrieve the [31: 16] (that is, the base address of the large page) bit of the large page descriptor, and form a 32-bit physical address with the MVA [] bit, that is, the PA corresponding to MVA (the number of bits in other forms is slightly different and will be detailed below ).

The following describes in detail the format of page table descriptors at all levels.

Level 1 page table Descriptor

Minimum two: 0b00: Invalid 0b01: The base address of the rough page table (coarse page table) [31: 10, this descriptor is the physical address of a second-level page table after being filled with 0 with 10 low bits. The second-level page table contains 256 entries (using [], 2 ^ 8 = 256 ), it is called a coarse page table ). Each entry represents a physical address space of 4 kb, and a rough page table represents a 1 MB physical address 0b10: segment [31: 20] As the base address of the segment, this descriptor is the starting address of a 1 MB physical address space after 20 bits are filled with 0. MVA [] is used for addressing in this 1 MB space. When the descriptor bits [31: 20] And MVA [] form the physical address mapped to the virtual address MVA in the form of segments, the conversion process from a virtual address MVA to a physical address PA is as follows: 1. The base address register bit of the page table [31: 14] And MVA [31: 20] to form a 32-bit address with the lower two digits as 0. MMU uses this address to find the segment descriptor 2 and obtains the segment descriptor bit [31: 20] (segment base address ), it and MVA [] form a 32-bit physical address (this is the PA corresponding to MVA)

0b11: Fine page table)

[31: 12] is the base address (fine page table base address) of the page table. After the low 12 bits of this descriptor are filled with 0, it is the physical address of a second-level page table. This level-2 page table contains 1024 entries (using [11: 2], 10 digits). Each entry indicates the physical address space of 1 kb, and one page table indicates the physical address space of 1 MB.

Level 2 page table Descriptor

Minimum two:

0b00: Invalid 0b01: large page descriptor bit [31: 16] is a large page base address, after the low 16-bit padding of this descriptor is 0, each entry in the rough page table with a starting address of 64 kB physical address space can only represent 4 kb physical space. If the large page descriptor is saved in the rough page table, the same large page descriptor is saved for 16 consecutive entries. Similarly, each entry in the page table can only represent 1 kb of physical space. If the large page descriptor is saved in the page table, 64 entries in a row store the same large page descriptor. The following uses the large page descriptor stored in the rough page table as an example to describe the address conversion process. 1. The base address registers of the page table [31: 14] And MVA [31: 20] to form a 32-bit address with the lower two digits as 0. MMU uses this address to find the coarse-page table descriptor 2. It extracts the [31: 10] (that is, the base address of the rough-page table descriptor ), it and MVA [] form a 32-bit physical address with a low two-digit value of 0, find the large page descriptor through this address 3, retrieve the large page descriptor [31: 16] (that is, the base address of a large page). It and MVA [] form a 32-bit physical address, that is, the PA steps 2 and 3 corresponding to MVA, MVA [] used for indexing in a rough page table and MVA [] for addressing in a large page have overlapping bits [], when the bitwise [] changes from 0b0000 to 0b1111, the large page descriptor obtained in step 2 is the same, so there are 16 consecutive entries in the rough page table to save the same large page descriptor.

0b10: Small page Descriptor

[31: 12] is the base address of the small page (small Page Base Address). After the low 12 bits of this descriptor are filled with 0, it is a 4 kb ([], a total of 12 bits, 2 ^ 12 = 4096) the starting address of the physical address space. Each entry in the rough page table represents a physical space of 4 kb. If the small page descriptor is saved in the rough page table, you only need to use one entry to save one small page descriptor. Similarly, each entry in a page table can only represent 1 kb of physical space. If a small page is saved in a page table, four entries in a row are saved in the same page descriptor.

The following uses the small page descriptor stored in the rough page table as an example to describe the address conversion process:

1. The base address of the page table [31: 14] And MVA [31: 20] form a 32-bit address with a low two digits of 0. MMU uses this address to find the coarse page table descriptor.

2. Retrieve the rough page table descriptor [31: 10] (that is, the base address of the rough page table). It and MVA [] form a 32-bit physical address with a low two-digit value of 0, use this address to find the small page Descriptor

3. Retrieve the bit of the small page descriptor [31: 12] (that is, the base address of the small page). It and MVA [11: 0] form a 32-bit physical address (that is, the PA corresponding to MVA)

The small page descriptor is stored in the small page table, and the address conversion process is similar to the above.

0b11: very small page Descriptor

[31: 10] is the base address of a very small page (tiny Page Base Address). The low 10 bits of this descriptor are filled with 0, which is the starting address of a 1 kb physical address space. A very small page descriptor can only be saved in a small page table, and an entry is used to save an extremely small page descriptor.

The following is the address conversion process for a very small page:

1. The base address register [31: 14] And MVA [31: 20] form a 32-bit address with a low two-digit value of 0. MMU finds the sub-page table descriptor through this address.

2. Retrieve the page table descriptor [31: 12] (that is, the base address of the page table). It and MVA [19: 10] form a 32-bit physical address with a low two-digit value of 0, you can use this address to find the very small page descriptor.

3. Retrieve the extremely small page descriptor [31: 10] (that is, the base address of the extremely small page). It and MVA [] form a 32-bit physical address (that is, the PA corresponding to MVA)