Sections and pagination, LDT and GDT

The address space of a process, from the user's point of view, consists of a number of segments (segment), which can be divided into two types: Private segment, shared segment (GKFX). The CPU is also in accordance with the user's logic for memory management (fragmentation), Intel Pentium specifies that each segment has a maximum of 8K, each segment maximum 4G. A CPU pair should have a GDT (Global descriptor Table), which describes the shared segment in detail, a table for all processes, and a process pair should have a LDT (local), The table details the private segment of the process, which is private to the processes.

The structure of the Gdt/ldt, each record has 64bit:

Structure of the Gdt/ldt

0-11 (12bit)	12-43 (32bit)	44-63 (20bit)
Property	Segment Base	Segment bounds

The hardware has a register called GDTR (registor), a total of 48bit, as follows:

Structure of the GDTR

0-31	32-47
Point to the beginning of the GDT	Specify the length of the GDT

Note: The 16bit above specifies the length of the GDT, which refers to the absolute length of the GDT from the point of the 32bit pointer to the end of the GDT, which is not the length of the table, not the record number of the table. The relationship between this absolute length and the length of the table (the number of record in the table) is shown below.

At the beginning of the article, Intel Pentium specified that each segment has a maximum of 8K, which means that each Gdt/ldt has 8K (2^13) RECORD,GDTR and also specifies that the absolute length of the GDT is 2^16, so that each record length in the GDT can be 2^16 /2^13 = 8Byte, a total of 64bit, exactly the same as described in the above Gdt/ldt structure.

The question comes again, since each Gdt/ldt can have a 2^13 record, then a minimum of 13bit selector is needed to determine which record is. The fact is that a logical address consists of two parts, as follows:

Structure of logical addresses

0-31	32-47
Intra-segment offset	Segment Selector

As can be found, the intra-segment offset of 32bit does determine the maximum size of each segment at 4G (as described at the beginning of the article). And selector is 16bit is not the 13bit we predict, in fact its structure is as follows:

Structure of the Segment selector

0-12	13	14-15
Point to a record in Gdt/ldt	Determine the GDT or the LDT	Operation Permissions

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From the above introduction to know how a logical address into a physical address (you can really get a 32bit address, first called his physical address, in fact, this 32bit address to be paged). Why is a logical address 48bit instead of 32bit (as shown in the table "logical address Structure"). We in the program if you print a variable address, is really a 32bit number ah, similar to 0x12345678, it is not 48bit ah. Remember, our program is in a segment (as described in the beginning of the article), whether it is the instruction or the data. We print out the address is actually the offset address within the paragraph, the program's 16bit section number by the operating system allocation management, we are invisible, but it does exist.

Assuming a process requires 1M of memory (instruction plus data), then the OS will first select a segment number (16bit) from the LDT, and give this process (in this section, we have 4G of space to play, but we only need 1M ^_^), if the process has the need for global space, The OS is also assigned to it in the GDT. So ... when the CPU is addressing, it also needs to locate the physical address according to the segment number plus the offset address within the paragraph.

Note : The above explanation is simple and does not explain pagination.

in summary, Segmentselector (16bit) + paragraph offset (32bit) = one 32bit address value

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I'm telling you, we're going to page through the 32bit address value we just got, and all of the following operations are done within 4G space within a segment. Pagination is divided into:

The operating system maintains a table for each segment, called a page table, with the following structure:

Page table structure

0-19	20-31
Page number	In-page offset

A page size with a page offset can be seen, is 4K, so in order to manage 4G of space, obviously this page table needs to have 2^20 record. A record 32bit=4byte,2^20 need 4MB of space. How to accept. The way to do this is to page the 0-19bit, and the new page table has the following structure:

Two page table structure for pagination

0-9	11-19	20-32
First-level page number	Level two page number	In-page offset

4G space altogether has 1024x1024 page, the first page divides this 1024x1024 page into 1024 groups, each group 1024, thus needs 1024 tables, each table 1024 record ... Then the second group, we use a table to manage the 1024 tables, obviously this table also has 1024 records, so there is a total of 1+1024 bill, the OS will swap the unused tables to external memory, to save memory space, improve the search efficiency.

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In summary, a new application for a space in the program, the approximate process is this:

---->os a segment number in the LDT, with 4G of space in the section;

----> Divide this 4G space into 1024 parts, each size x 4K

----> divide each minute into 1024 parts, each size 4K

----> Assign one or several of them to the applicant and record them.

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Note: This article is for beginners comprehensive textbooks and forum materials original, in order to deepen understanding, only the logic is correct, not rigidly specific details (such as how many bits, and bit order). It only provides an OS-managed memory scheme, not so the OS is designed to do so, and even with this design, the specifics of the implementation will vary depending on the OS.