[Serialization] [FPGA black gold Development Board] those issues of niosii-Software Development (2)

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In this section, I will explain to you the software development part of niosii, which is based on the hardware development department in section 1. If you read this section, let's review what we mentioned in the previous section.

Review

In the previous section, we explained in detail the whole process of the hardware development part of the niosii, including the establishment of the project, the construction of the niosii software core, and the frequency doubling of the PLL and how to download it. Among them, the construction of the niosii soft core is the key content. We have built six modules in the soft core: CPU, SDRAM, aveon three-state bridge, Flash, System ID, and jtag uart, the clock is designed to be 100 MHz and flash is in 8-Bit mode. This section describes the entire process of software development in detail.

Summary

First of all, I will give you a brief introduction to the important content of this section. This section will detail the entire process of software development for niosii, this section briefly introduces some simple methods of using the niosii 9.0 IDE, which will make it easy for those who have never used the niosii ide software.

Introduction to niosii ide

Niosii IDE is an integrated development environment based on the Eclipse IDE framework. It includes many features and should be very familiar to Java users, its functions are very powerful. Next we will briefly introduce the functions and features of the niosii ide:

• GNU development tools. People familiar with Linux must be familiar with it. It is an open-source compilation environment, including standard GCC compilers, connectors, compilers, and makefile tools. When it comes to this, everyone may have a big head. What are these things? If you are a loyal fan of Linux, you must be very clear about these things, however, you only need to know about this during the development of niosii. You don't have to figure it out. However, I strongly recommend that you learn about Linux here, once you get in touch with it, you will find that its charm is too great, and the good stuff in it will benefit you all your life, let's continue with our niosii.
• GDB-based debugging tools, including simulation and hardware debugging. This is also a popular debugging tool on the Linux platform, so Linux is very powerful. Integrates a hardware abstraction layer (HAL );
• Supports microchip/OS II and lwtcp/IP protocol stacks.
• Supports flash download (flash programmer and Quartus II programmer ).

There are so many theories. Let's take a look at them.

Establish Software Engineering

First, open the niosii 9.0 ide software. Then, the interface of the niosii IDE is displayed in front of us. The interface is very simple and there is no big difference with other ides, what we need to do is first create a software project, as shown in, file-> New-> Project

After you click it, the Project Wizard Page is displayed, as shown in. Select the content in the red circle, and select the content in the red circle,

Click Next, And the content is displayed. The project name is displayed in the Red Circle 1, I change it to hello_world, and the red circle 2 is the target hardware file. Click Browse, find the location of the niososs generated in the previous section. The file is. PTF is a suffix. if the address is the same as my address, the address should be in E: \ NIOS \ kernel. PTF. Select "Hello World" in red circle 3, which is a project template. Let's talk about the Red Circle 4. This place changes the position of the project. If it is not modified, the position of the software project is under the software under the Quartus project directory.

Click Next. You do not need to modify the settings. Click Finish to complete the project wizard.

After completing the above project wizard, we officially enter the interface of the niosii IDE, as shown in, I will mainly introduce three parts, the other parts are of little use. I named the three partsCodeArea, project directory area, and observation area (these names are very shanzhai. What brother is pursuing is easy to understand, huh, huh)

Needless to say, the code area shows the code. The project directory area shows all the files related to the project, which is related to us. C and. h file, there is a very important system. h file. We often use two columns in the observation area. One is the console and the other is problems. The first is the compilation information display area, and the other is the error warning display area. With the jtag uart, the first console column has an additional purpose, which is used as a standard output (stdout) terminal. We will use it later.

Our next job is to configure the project. Come with me. Right-click the hello_world item in the project directory area and click system library properties in the red circle.

Click it to view the interface shown in,

In order, red circle 1 is the setting area of standard input (stdin), standard output (stdout), and standard error (stderr). We have constructed jtag uart in the soft core, the effect is shown here. If we didn't build the jtag uart, then the jtag_uart option will not appear in this place. In the red circle 2, this place does not need to be modified. However, you must note that the support C ++ library is larger than the small C library, if you do not have flash or large-capacity storage devices such as SDRAM, you can use small C library to run small files with the internal SRAM of FPGA.Program. In red circles 3, this is some memory-related options. We have built the SDRAM module, which is also used here. By default, this can be done without modification. It should be noted that the Red Circle is 4. After you click red circle 4, the following interface appears. This is the configuration interface for the compiler. You can observe it by yourself. Most of the interfaces do not need to be modified, let's take a look at the important points and click the red circle.

After clicking, let's see what it looks like. There are two key points here: one is the Red Circle 1, where the compiler optimization level is configured, and the other is the debugging level. The optimization level of the compiler will make your generated code smaller. If your code is not rigorous, it may be difficult to use it later. The debugging level is the amount of compiled content displayed during the compilation process. The higher the level, the more content displayed. We recommend that you set the debugging level to the highest level.

After setting the preceding settings, click Apply, and then click OK to return to the home page.

Next we will start to compile. The first compilation takes a long time, because a very important file system we mentioned earlier will be generated during the compilation process. h. This file is generated based on the system. the content of H corresponds to the soft-core modules one by one. Once the soft core changes, it is necessary to re-compile and re-generate the system. h file. Compile now, as shown in. Right-click the project directory bar, click build project in the red circle, or press the shortcut key Ctrl + B.

After the compilation starts, the following interface will appear. The progress bar is slow. If you don't want to read it, click Run in background and compile it in the background. In the compilation structure, you can observe the content in the console bar in the bar. The content that appears is what the compiler is compiling. You may wish to take a good look at what is compiled and generated during the compilation process.

After compilation, you can see the following interface, the red circle shows that the compilation is complete.

You can compare the changes in the project directory before and after compilation.

It seems that the compilation results are quite remarkable. We don't need to know anything about others. The key is the system. h file we mentioned repeatedly. Next we will pull it out, and it remains hidden.

As you can see, it is in hello_world_syslib/debug/system_description/system. H. Now let's take a look at what is so important.

After double-clicking, you can see in the code area that there are some macro definitions. Let's look for a typical example. I will explain it to you and see the following

Jtag_uart_base, jtag_uart_irq, jtag_uart_base is the base address of jtag_uart, jtag_uart_irq is the interrupt number, and others are some configuration information. Likewise, SDRAM, Flash, and so on all have corresponding base addresses. We will use these addresses to perform register operations on the Nios soft core in the future to achieve the same register operation method as the single chip microcomputer, we will not go into detail here. We will explain this section separately later. After reading this example, we are looking at other things, which are similar. If there is no interruption, the * _ IRQ item will not appear. Do not believe it. This is what makes NIOS powerful. You can build soft Cores based on your needs, and then generate corresponding registers. The whole build is controlled by the designers. What is missing, if not, you can write the underlying modules on your own.

The system. h file will be mentioned later. Let's talk about this for the time being. Next, let's see if our compiled program is the same as what we think. There are several methods to verify the performance of the system. One is direct online hardware simulation and the other is software simulation. We first talk about the first kind of hardware online simulation, it is clear that this method requires hardware cooperation, a Development Board, a simulator (simulator is a household USB-BLASTER or BYTE-BLASTER ). Connect the simulator to the JTAG port of the Development Board. (assume that your simulator driver has been installed. If you do not know how to install the simulator driver, contact me ). After the installation, we will perform the following operations and click the Red Circle of the niosii hardware.

After clicking, you can see the console in the observation bar. If everything is normal, we will see the following results.

Have you seen it? If you do not see it, check whether your operation is the same as what I said. If you cannot solve it yourself, contact me and I will help you solve it.

After the online simulation of the First hardware, let's talk about software simulation. Hardware is not required for software simulation. Run the computer separately. Click the red circle as shown in the following figure and run the niosii insruction set simulator.

After you click it, check the console in the observation bar. The result is the same. I do not recommend Software Simulation for everyone, because software simulation is fine without involving hardware. If there is any hardware operation, the effect will be lost.

So far, our software development part of the niosii is over. If you want to be familiar with the niosii IDE, you should try it yourself. It is impossible to explain it by myself, when you are okay, you can look at each of its options and their functions. In this way, you can become more familiar with it, better master it, and make good use of it. I would like to say that we do not recommend that you update the software frequently. to upgrade the Quartus and NIOS software, you just need to solve some bugs, support more devices, and make compilation faster. Before you encounter a very serious bug, you 'd better not update it. The consequence of the update is to become familiar with its features. There is a great change between 9.1 and 9.0 in the niosii IDE, and it is not so easy to use. We recommend that you do not change it easily.

Now, the content of this section is over. In the next section, I will explain to you how to make the development of niosii as simple as a single-chip microcomputer, see through the Register operation method of the system ". This section is the core part of my tutorial. I hope you can wait patiently!