Seventh Week Blog

Source: Internet
Author: User

Sixth chapter Memory Hierarchy

Memory system: A hierarchy of storage devices with different capacity or cost and access times

6.1 Storage Technology

Earlier computers had only thousands of bytes of random access memory, and the first IBM PC did not even have a hard drive

6.11

Random access Memory: Static (SRAM): Used as cache memory, can be on the CPU chip, or on the chip

Dynamic (DRAM): A frame buffer used as the primary storage and graphics system

Static Ram:sram store Each bit in a bistable storage unit

Because of the bistable nature of the SRAM memory unit, it will always hold its value as long as there is electricity.

Dynamic Ram:dram stores each bit as a charge to a capacitor

The DRAM memory unit is very sensitive to interference, and when the capacitance voltage is disturbed, it will never recover.

The Tanyuan in the traditional Dram:dram chip is divided into D-cells, each of which consists of a W darm unit, and a d*w dram stores the DW bit information in total.

Each DRAM chip is connected to a circuit called a storage controller that can transmit the W bit to each DRAM chip at once or the W bit from each DRAM chip at once.

Memory modules

The DRAM chip is packaged in a memory module and is plugged into the expansion slot of the motherboard.

Common packaging: 168-pin dual-inline memory module (64-bit transmission)

72-pin single inline memory module (32-bit transmission)

Enhanced DRAM: fast-page mode

Extended Data output dram

Synchronous DRAM

Double Data rate synchronous DRAM

Video RAM

Nonvolatile Memory: If power is lost, DRAM and SRAM lose their information, in this sense, they are volatile, although some types of ROM are both readable and writable, they are collectively referred to as read-only memory.

PROM (programmable ROM) can only be programmed once

Flash Memory: A class of nonvolatile memory, based on EEPROM

Access to main memory: Data traffic is sent back and forth between the processor and the DRAM main memory via a shared electronic circuit called a bus.

Mainline: A set of parallel conductors that can carry addresses, data, and control information

Disk storage: Disks are widely used storage devices that store large amounts of data, and the amount of data stored can be up to hundreds of thousands of gigabytes, while RAM-based storage can only have hundreds of or thousands of megabytes.

Construction: Composed of platters, the surface of the disc is covered with magnetic recording material, and the center has an optional spindle.

Disk capacity is determined by the following technical factors:

Recording density

Track density

Surface density

Disk Operation: Seek time

Rotation time

Transfer time

Logical Disk Block

Connecting to 1/0 Devices: Universal Serial Bus

Circular Card

Host Bus Adapter

6.13 Solid State Drive (SSD)

: is a flash-based storage technology

An SSD package consists of one or more flash chips and a flash translation layer, and the SSD packet is plugged into a standard hard drive slot on the i/0 bus, and behaves like any other hard disk, processing requests from a read-write logical disk block from the CPU.

6.2 Local Sex

: A well-written computer program often has good locality

Time locality

Spatial locality

: Locality of data references

Locality of the fetch instruction

6.3 Memory Hierarchy: storage technology

Computer software

The complementarity of these basic properties of hardware and software is known as: Memory hierarchy

Caching: Using the cache process

The data always takes the size of the block as the transmitting unit

Cache Hit

Cache not hit

Cache Management

6.4 Cache Memory

Early computer memory once had only three layers: CPU register DRAM main memory and disk storage

General-Purpose Cache memory Architecture

Direct Map cache: Only one row of cache per group

Group selection in direct map cache

Row matching in direct map cache

Word selection in direct map cache

Row substitution in direct mapping cache when not hit

Direct mapping Cache in operation

Read the word address 0

Read the Word address 1

Read the word address 13

Read the word address 8

Conflict misses in direct map cache

6.4.3 Group-linked cache

Group selection in group-by-group cache

Row matching and word selection in group-cascade cache

Row substitution for group-in-group cache misses

6.4.4 Full-Phase cache

Group selection for fully-connected caches

Navigation matching and word selection in full-phase-linked cache

parameter impact of 6.4.7 cache performance

Impact of cache Size

Effect of block size

The influence of the degree of coupling

Impact of Write policies

Reference to the book

Seventh Week Blog

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