Signal Processing Circuit for ZZ Infrared Focal Plane Array

Abstract:The development of the signal processing circuit of the infrared focal plane array is introduced. The basic structure, working mode and application fields of CCD Multi-Channel transmitter (CCD-MUX), time delay integrated CCD (TDI-CCD), MOS and CMOS multi-channel transmitter (CMOS-MUX) are described. Finally, two application circuits of multichannel transmission devices are provided.

Keywords:Signal processing circuit of infrared focal plane array for multi-channel transmitter infrared detector

In the future, Signal Detection in infrared systems (such as thermal imaging systems, guidance systems, and monitoring systems) will be based on the focal plane array of infrared detectors. The Infrared Focal Plane Array (IRFPA) Simplifies or removes scanning from the machine to improve system performance. The infrared focal plane array device is a new structure that encapsulates a large number of sensitive elements and requires constant temperature operation. In this new structure, the electrical signals output by the IRD are processed on the focal plane. Generally, the signal processing method on the same substrate of the detector is called the single-chip IRFPA infrared processing method, while the infrared detector (IRD) is prepared on different substrates respectively, then, the hybrid IRFPA is formed by reinstallation and interconnection of the primary column. Infrared Detectors (IRD) have different types, such as photovoltaic type (PV) Antimony indium IRD, light-conducting type (PC), hgcadmium, PBS, PbSe, phsnteird, metal silide (pd2si, ptsi, irsi), two-step sbird, and SiGe/Si) inner photoelectric emission IRD, lattice quantum well (alaas/AAS, SiGe/Si) IRD and so on. They also have various signal processing circuits, such as SCCD, bccd, mccd, SCD, TDI-CCD, MOS switch, CMOS static (or quasi-static) shift Register multiplexing transmitter (CMOS-MUX) and so on. This signal processing circuit is currently single chip (CMOS-MUX) and so on. These signal processing circuits are commonly used infrared signal processors in single-chip (or hybrid) infrared focal plane arrays. So far, signal processing circuits used as infrared focal plane arrays are made of silicon. It is difficult to manufacture high-performance signal processing circuits using materials other than silicon.

In order to develop an infrared system with excellent performance, apart from the mature infrared detector (IRD) preparation process, designing and developing a signal processing circuit is the most important factor to improve IRFPA performance. The main design requirements of the signal processing circuit are high charge storage capacity, high transfer efficiency, low noise, low power consumption, Background Suppression and multi-channel transmission. In addition, after the irfpa infrared detector converts the incident light into a charge, the generated signal charge must be injected into the signal processing circuit for multi-channel output.

The following describes the basic structure, working method and application fields of several signal processing circuits.

Signal Processing Circuit for Infrared Focal Plane Array

1.1 silicon CCD Multi-Channel Transmitter

The Circuit Principle 1 of the silicon CCD Multi-Channel transmitter (siccd-MUX) is shown in the figure T1, T2 ......, TN is the N headers of the input signal. The main function of siccd-MUX is to combine multiple lines (16, 32, 64, 128, 256,…) in the infrared thermal imaging system ,... ) Infrared detectors and line output signals are converted to serial output signals. Its main advantages are low noise, high sensitivity, and high working frequency. Since all input signals are output through a low-noise, high-sensitivity charge detector, the non-uniformity of output signals is easier to solve.

Siccd-MUX can not only be matched with a light-conducting hgcadmium long-wave infrared detector, but also be compatible with a photovoltaic hgcadmium infrared detector (pvhgcadmium-ird) in an advanced second-generation infrared detection system) matching [1], because the direct injection method is used for this matching, it eliminates the need for a low-temperature front-amplifier for a light-guide hgcadmium long-wave infrared detection system. This makes the entire system more compact, with lower power consumption, and greatly reduces the burden on the cooler, so that long-wave infrared signal processing begins to enter the focal plane signal processing era.

Direct Injection of siccd-MUX can be used in high-Background scenarios that require strong Background Suppression capabilities, such as tactical guidance and tracking systems. Therefore, the direct injection siccd-MUX design is more complex than the AC lily-type siccd-MUX design in the optical system. Its input structure should have the functions such as injection and charge halo, division, skimming and elimination background. Figure 2 shows the structure of the Direct Injection siccd-MUX.

1.2 time delay integrated CCD

The Time Delay Integral CCD (TDI-CCD) is shown in 3. Its main function is to apply different time (4tc, 8tc ,..., 32 TC) latency, and synchronous superposition (integration) at the output end to improve the signal-to-noise ratio. Because the output signal of Infrared Detectors With TDI-CCD matches the infrared radiation intensity of the same target. Therefore, after linear superposition, the output signal will increase by Factor M (m represents the number of inputs ). However, the noise of the infrared detector hgcadmium is related to the noise of each channel corresponding to the TDI-CCD. Therefore, the output end of the infrared detector increases by Factor M by 1/2. In this way, the output signal-to-noise ratio increases by M/(m) 1/2 = m 1/2 times.

In addition to detecting the weak infrared signal in the Infrared Thermal Imaging System, the TDI-CCD can also be used as a CCD corator In the spread spectrum system to detect the signal with Signal Noise-to-noise ratio less than 1.

TDI-CCD is a function circuit, in addition to separate use, can also be used as a signal processor of the hybrid infrared focal plane array. 1.3 Time Delay integrated CCD Unit

The circuit integrates Time Delay integrated CCD (TDI-CCD) and silicon CCD Multi-Channel transmitter (siccd-MUX) on a single chip, so its structure and functions will be more complex. When it is used as a signal processing circuit [2, 3] for a hybrid hgcadmium infrared focal plane array, it can be directly welded by the indium column and the 4N photovoltaic hgcadmium infrared detector, to form the so-called infrared focal plane array signal processing circuit.

As shown in figure 4, the y direction is the time delay integration direction, and the X side is the output direction of Multiple CCD transmitters. Figure 5 shows the structure of the TDI-CCD chip that matches it.

Table 1 shows the number of pixels and working wavelength of hybrid hgcadmium infrared focal plane array with TDI-CCD reading mode.
Table 1 4N hybrid hgcadmium-IRFPA [3]

Number of pixels
Operating wavelength (m)
Company

4 × 300
8 ~ 9.8
Sofradir France

4 × 100
8 ~ 10.6
Japan

4 × 1280
1 ~ 2.45
Santa Barbara Research Center

4 × 256
8 ~ 12
Phillipos components Co., Ltd.

4 × 240
7.5 ~ 10.7
Sofradi France

4× 48
8 ~ 12
Sofradi France

4 × 256
3 ~ 5
Sofradi France

4 × 60
8 ~ 12
Santa Barbara Research Center

4 × 1024
8 ~ 12
Santa Barbara Research Center

4 × 128
8 ~ 12
Santa Barbara Research Center

4 × 960
8 ~ 12
Santa Barbara Research Center

4 × 480
8 ~ 12
Santa Barbara Research Center

4 × 288
8 ~ 12
Sofradi France

4 × 960
8 ~ 12
Texas Corporation

4 × 576
3 ~ 5.2
Sofradi France

4 × 288
3 ~ 5
Sofradi France

4 × 480
3 ~ 5
Sofradi France

4 × 8
1.5 ~ 2.5
Russian Orion Research and Production Center

4 × 16
1.5 ~ 2.5
Russian Orion Research and Production Center

4 × 64
3 ~ 5
Russian Orion Research and Production Center

4 × 128
8 ~ 12
Russian Orion Research and Production Center

4 × 256
8 ~ 12
Russian Orion Research and Production Center

1.4 MOS switch multi-channel Transmitter

6 shows the basic structure of the multi-channel transmitter of the mos switch. Each photodiode is associated with the memory splitter in the unit. The digital horizontal scan shift register (usually manufactured on a chip) is located at the top of the graph (typically manufactured on a chip), while the multi-channel transmitter is located at the left of the graph. Select a column of two poles and storage capacitors at a time for scanning shift registers. In addition, select a line of bus for the Vertical Scan shift register. In this way, each pixel can be recorded separately sequentially, and The Pixel Signal charge is transferred to the multi-channel transmitter for reading.

As the signal processor of the infrared focal plane array, the multi-channel transmitter with the power switch has many advantages. First, the circuit density can be very high, so that more space is available for the storage of electric tea, and the noise performance is good, so the dynamic range is very high. Secondly, the Silicon Processing technology used in the design of the mos has been highly standardized, so it can be produced in bulk to reduce costs. The third point is that the interface requirement of the signal reading device for the infrared focal plane array is very simple, because some clock and Switching circuits can be placed next to the chip, this reduces the number of clock waveforms that need to pass through the duwa wall. In the development of cooled infrared focal plane arrays, at present, we have developed an infrared focal plane array of 64 yuan, 128 yuan, 128 yuan, and 128 yuan x 256 yuan and 256 yuan x yuan with a multi-channel transmitter read-out structure. In the development of a non-cooled infrared focal plane array, plessey research Caswell, a British company, has developed a heat release line array of 16 yuan, 40 yuan, and 64 yuan non-cold infrared focal plane array with a multi-channel transmitter read-out structure. In order to further improve the performance of the infrared focal plane array, a MOS structure field-Effect Transistor (mosjfet) switching multi-channel transmitter is developed on the basis of the multi-channel transmitter of the mos switch.

1.5 CMOS multi-channel Transmitter

In the development of infrared focal plane arrays (IRFPA), people always hope to develop infrared signal processors with lower costs, better productivity, and greater dynamic range, this has led to research on CMOS multi-channel infrared signal processor. Now, the emergence of advanced CMOS technology makes it possible to design high-density, multi-function CMOS multi-channel transmitter. This multi-channel transmitter is capable of executing the signal section, transmission, processing and scanning of a dense line array and an array of infrared focal plane arrays [4] (single-chip or hybrid. Therefore, the infrared focal plane array (IRFPA) using the CMOS-MUX reading device can design an infrared Machine System with smaller size, lighter quality, lower power consumption and better performance.

The CMOS-MUX can be used as a signal processor for the silicon platinum shotter's Barrier Infrared Detector Array, in the development of infrared detector arrays, such as hgcadmium, InSb, alaas, INASP/indium, PBS, pbte AND InGaAs, designers often want to use CMOS-MUX as infrared signal processor. The function of the CMOS transmitter is shown in figure 7.

2 Application Circuit

2.1 signal reading circuit of multi-channel Transmitter

Infrared detector arrays, especially infrared detectors without Silicon Materials, generally require special design and preparation of multi-channel transmitter (MUX) as the infrared signal processor of the infrared detector array. Currently, in the design and development of multi-channel transmitter, A variety of silicon multi-channel transmitters (such as Si-CCD, Si-mos, Si-cmso, and Si-JFET) with mature silicon materials have been developed ), in the development of single-chip (or hybrid) IRFPA, apart from the mature infrared detector preparation technology, the key factor for improving IRFPA performance is the development of a silicon multi-channel transmitter with low pulling consumption, low noise, high charge storage capacity, and ease of integration or coupling with infrared detectors. Table 2 shows the charge storage capacity of the silicon multi-channel transmitter.
Table 1 Charge Storage Capacity of silicon multi-channel Transmitter

Silicon multi-channel Transmitter
Charge Storage Capacity per unit (electronic)

SCCD
5x10 6 ~ 10 7

Bccd
5x10 6

Mccd
1.1x10 7

Mos
6*10 6 ~ 1.2X10 8

JFET
10 6 ~ 10 8

CMOS
1.6x10 6 ~ 1.1x10 7

CSD
5.2x10 5

Application Circuit 8, which is read out in an staggered array with two multi-channel transmitters, is shown in. As shown in the figure, in the standard and mirror images with staggered reading, the multi-channel transmitter is located on both sides of the detector array, so that the two multi-channel transmitters can mirror each other. Even pixels of the detector array are connected to the welding feet on one side of the array, and the odd pixels are connected to the other side of the array. Then, these welding feet of the array are connected to the corresponding multi-channel transmitter, and read it from two channels. At last, the video signal is merged out of the chip to be returned to a single data stream. This solution doubles the length of the applied imaging array and makes the distance between the pixel and the pixel smaller while still using ready-made components.

The multiline transmitter can be used together with the array imaging array. You can use a multi-channel transmitter control switch to connect each line of pixels with the corresponding video lines in each column, and then use another multi-channel transmitter to read the corresponding video lines in each column. If all the switches on a row connect all pixels to the video of this column, all the columns are read.

The timing mechanism will timing one of the welding pins of the multi-channel transmitter connected to the on-board switch of the array, and then timing all the multi-channel transmitters connected to the video, this process continues until all rows are read.

2.2 buffer multiplexing transmitter Application Circuit

The welding pin of the buffer multiplexing transmitter provided by EG & G reticon for 64, 128 or 256 channels is located at one row with a spacing of 100 μm. The input bias current of the device is as low as 100fa. The conversion gain of the front amplifier is 1 μV per 100 electrons. Figure 9 shows the information target display of the Enable and stop detector arrays of two sampling retained gates. To integrate a multi-channel transmitter with a detector array, the device connects the photosensitive device to the Solder Pad and Associates each solder pin with a channel, this channel uses a 15pf feedback integrated capacitor to replace the input charge with the output voltage. The switching sampling circuit of the capacitor can provide the related double sampling function to reduce noise and offset.

The application circuit has two sampling retained gates. One sampling retained switch is enabled when the optical energy point starts. The other sampling retained switch is started when the point ends. One of the two sets of sampled output data pulses contains the stray noise that has occurred, while the other output pulse contains the signal and the noise of the integral and conversion optical pulses. Therefore, two sets of output differential synthesis should be made to subtract the noise that occurs in the reading compartment.

3 conclusion

Any IRFPA, whether single-chip or hybrid, is composed of two parts: infrared photoelectric conversion and signal processing. The signal processing of almost all infrared focal plane arrays (IRFPA) is implemented by silicon material and silicon signal processing circuits. This is because now the most mature Silicon Materials, the signal processing circuit design and technology made of silicon has been able to meet the needs of IRFPA.

The silicon signal processing circuit in IRFPA provides functions such as signal reading, integration, Background Suppression, pre-amplification, sampling and holding, and multi-channel transmission. In principle, the current microelectronics technology can fully integrate these functions into a silicon chip. However, for IRFPA, especially area arrays, the area that can place these circuits is often very limited. Therefore, we must consider using a very simple and effective input-level circuit, silicon CCD Multi-Channel transmitter (Surface Groove CCD, buried groove CCD, curved groove CCD), time delay integrated CCD, mos, and charge scanner (CSD) are usually used) and CMOS multi-channel transmitter circuit to achieve IRFPA signal processing. However, due to the small charge storage capacity of the silicon CCD Multi-Channel transmitter, the impedance of the infrared detector is high, and the transfer loss and complicated process exist. Therefore, in recent years, in the development of IRFPA, signal processing circuits of both cold and non-cold IRFPA are increasingly adopting highly developed CMOS multi-channel transmitters.