Stm32 Register Edition Learning Note SPI

SPI (Serial peripheral Interface), serial Peripheral interface. SPI is a high-speed, full-duplex, synchronous communication bus.

The SPI interface typically uses 4 lines of communication:

Miso Master device data input, from device data output

MOSI Master device data output, from device data input

SCLK clock signal, with main device generated

CS from the device chip select the signal, there is the main device control

In order to exchange data with peripherals, the SPI module can configure the output serial synchronization clock polarity and phase depending on the operating requirements of the peripheral. The Cpol (clock polarity) bit of the SPI_CR register, which controls the idle state level of the clock without data transmission, which is valid for both main mode and slave mode devices. Cpol=0, the idle state of the serial sync clock is low, and the idle state of the serial Sync clock is high cpol=1. The Cpha (clock phase) bit of the SPI_CR register, which can be configured to select one of two different transport protocols for data transfer. Cpha=0, the first hop edge (up or down) data in the serial synchronization clock is sampled; Cpha=1, the second hop edge (up or down) of the serial synchronization clock is sampled.

1.SPI Main Mode configuration steps

① Enable SPI Clock, configure PA port

APB2 Peripheral Clock Enable register (RCC_APB2ENR)

APB1 Peripheral Reset Register (RCC_APB1RSTR)

Eg:rcc->apb2enr|=1<<2;//porta clock Enable

rcc->apb2enr|=1<<12; SPI1 Clock Enable
This is only initialized for the SPI port.
gpioa->crl&=0x000fffff;
gpioa->crl|=0xbbb00000;//pa5.6.7 multiplexing
gpioa->odr|=0x7<<5; PA5.6.7 Pull Up

② Open full duplex mode and software management NSS

SPI Control Register 1 (SPI_CR1) (not used in I2S mode)

eg:spi1->cr1|=0<<10;//Full Duplex mode
spi1->cr1|=1<<9; Software NSS Management
spi1->cr1|=1<<8;

③ Setting the SPI to host and format the data frame

eg:spi1->cr1|=1<<2; SPI host
Spi1->cr1|=0<<11;//8bit data format

④ setting the clock polarity and phase polarity

　

eg:spi1->cr1|=1<<1; SCK in idle mode is 1 cpol=1
spi1->cr1|=1<<0; Data sampling starts on the second time edge, cpha=1

⑤ transfer rate and Lsbfirst frame format settings

eg:spi1->cr1|=7<<3; fsck=fcpu/256
spi1->cr1|=0<<7; Msbfirst

⑥ Enable SPI

eg:spi1->cr1|=1<<6; SPI device Enable

2.SPI

1 //SPI Port Initialization2 //The needle here is the initialization of the SPI1.3 voidSpi1_init (void)4 {     5rcc->apb2enr|=1<<2;//Porta Clock Enable6rcc->apb2enr|=1<< A;//SPI1 Clock Enable7            8     //This is only initialized for the SPI Port9gpioa->crl&=0x000fffff; Tengpioa->crl|=0xbbb00000;//PA5.6.7 Multiplexing Onegpioa->odr|=0X7<<5;//PA5.6.7 Pull Up A          -spi1->cr1|=0<<Ten;//Full Duplex mode -spi1->cr1|=1<<9;//Software NSS Management thespi1->cr1|=1<<8;  -  -spi1->cr1|=1<<2;//SPI host -spi1->cr1|=0<< One;//8bit Data Format +spi1->cr1|=1<<1;//SCK in idle mode is 1 cpol=1 -spi1->cr1|=1<<0;//data sampling starts on the second time edge, Cpha=1 +spi1->cr1|=7<<3;//fsck=fcpu/256 Aspi1->cr1|=0<<7;//Msbfirst atspi1->cr1|=1<<6;//SPI device Enable -Spi1_readwritebyte (0xFF);//initiate transmission (main function: maintain Mosi to high) - }    - //SPI1 speed Setting function - //speedset:0~7 - //SPI Speed =fapb2/2^ (speedset+1) in //APB2 clock is typically 72Mhz - voidspi1_setspeed (U8 speedset) to { +speedset&=0X07;//Restricted range -spi1->cr1&=0xffc7;  thespi1->cr1|=speedset<<3;//Set SPI1 speed *spi1->cr1|=1<<6;//SPI device Enable $ } Panax Notoginseng //SPI1 Read and write a byte - //txdata: bytes to write the //return value: bytes read to + U8 Spi1_readwritebyte (U8 txdata) A {         theU16 retry=0;  +      while((spi1->sr&1<<1)==0)//wait for Send area empty -     { $retry++; $         if(retry>0XFFFE)return 0; -     }               -spi1->dr=txdata;//Send a byte theretry=0; -      while((spi1->sr&1<<0)==0)//wait for a byte to finish receivingWuyi     { theretry++; -         if(retry>0XFFFE)return 0; Wu     }                                   -     returnspi1->dr;//returns the data received About}

SPI.C

1 //SPI bus Speed setting2 #defineSpi_speed_2 03 #defineSpi_speed_4 14 #defineSpi_speed_8 25 #defineSpi_speed_16 36 #defineSPI_SPEED_32 47 #defineSpi_speed_64 58 #definespi_speed_128 69 #defineSPI_SPEED_256 7Ten                                                                                          One voidSpi1_init (void);//initializing the SPI Port A voidSpi1_setspeed (U8 Speedset);//Setting the SPI speed -U8 Spi1_readwritebyte (U8 txdata);//SPI Bus reads and writes one byte -           the #endif

spi.h

Stm32 Register Edition Learning Note SPI