STM32 Gpio Pattern Understanding

Stm32 of the GPIO There are several types of configuration patterns, including:

1. analog input;

2. floating air input;

3. Pull- up input;

4. Drop- down input;

5. Open- drain output;

6. Push- pull output;

7. Re- use open-drain output;

8. multiplexing push-pull output

is a GPIO schematic diagram of the structure:

1. Analog Input

from what we can see, I think the most important thing about analog input is that he doesn't go through the input data register, so we can't get the value of the analog input by reading the input data register, which I think is very well understood, because the input data registers are not stored in the 0 is that 1 , and the analog input signal does not meet this requirement, so naturally it cannot be put into the input data register. The input mode allows us to obtain an external analog signal.

2. Floating Air input

the input state, my understanding is that its input is entirely outside the decision, I think in data communication should be able to use this mode. Should be in the data communication, our intuitive understanding is that both ends of the line connected to the sending side and receive the break, they need to accurately obtain the other side of the signal level, do not need external intervention. So I think this situation is suitable for floating-space input. For example, we are familiar with the i²c communication.

3 pull-up input

The pull-up input is the use of a pull-up resistor on the input circuit. The advantage of this model is that when we do not enter anything, because of the internal pull-up resistor, our processor will feel that we have entered a high level, which avoids the uncertainty of the input. This is useful in situations where the input level is required to be both high and low levels.

4 Drop- down input

Similar to the pull-up input, but when the drop-down is not entered externally, our processor will feel that we have entered a low level.

5 open-Drain output

Open-Drain output, the output is equivalent to the transistor collector, so suitable for use with current-driven applications. To get a high level, pull-up resistors are required.

6 push-Pull output

Push -Pull output uses a push-pull circuit, combined with the push-pull circuit's characteristics, it is made up of two MOSFET composition, one conduction at the same time, the other one up to, two MOSFET connect the high and low levels separately, so which one will output the corresponding level. The push-pull circuit is fast and the output is strong, and the direct output is high level or low level.

7 multiplexed Open-drain and multiplexed push-pull

We know it's just for GPIO re-use only. So that the ordinary GPIO has other functions.

Push-Pull output:

Can output high, low level, connect digital devices; Push-pull structure is generally referred to as two transistors by two complementary signal control, always in one transistor on the time of the other cutoff. High and low levels are determined by the IC's power supply.

Push-pull circuit is two parameters of the same transistor or MOSFET, to push-pull mode exists in the circuit, each responsible for positive and negative half-cycle of the waveform amplification task, the circuit work, two symmetrical power switch tube only one conduction at a time, so the conduction loss is small, high efficiency. The output can either sink current to the load or pump current from the load. The push-pull output stage increases the load capacity of the circuit and increases the switching speed.

Detailed Understanding:

, the output stage of the push-pull amplifier has two "arms" (two sets of amplification elements), while the current of one "arm" increases, the current of the other "arm" decreases, and the state of the two shifts. For the load, it seems to be an "arm" in the push, an "arm" in the pull, together to complete the current output task. When the output high level, that is, the lower load gate input high level, the output of the current will be subordinate door from the power supply by VT3 pull out. In this way, the output high and low level, VT3 and VT5 Road will be alternating work, thereby reducing the power consumption, improve the capacity of each tube. And because no matter where to go, the resistance of the tube is very small, so that the RC constant is very small, the transition speed is very fast. Therefore, the push-pull output stage improves the load capacity of the circuit and improves the switching speed.

Open-Drain output:

The output is equivalent to a transistor collector. A pull-up resistor is required to obtain a high level state. Suitable for the current-type drive, its ability to absorb current is relatively strong (generally 20ma or less).

The circuit of the open-drain form has several features:

2. The drive capability of the external circuit is used to reduce the internal drive of the IC. When the IC internal MOSFET is on, the drive current is from the external VCC through R pull-up, MOSFET to GND. Only a very lower gate drive current is required inside the IC.
4. In general, the open-drain is used to connect different levels of the device, matching the level, because the open-drain pin is not connected to the external pull-up resistor, can only output a low level, if you need to have the function of high output, you need to connect the pull-up resistor, a good thing is to change the power supply voltage, you can change For example, with the pull-up resistor you can provide Ttl/cmos level output and so on. (The resistance of a pull-up resistor determines the speed at which the logic level transitions along.) The higher the resistance, the lower the power consumption, so the choice of load resistance should take into account both power consumption and speed. )
6. Open-drain provides a flexible way to output, but it also has its weaknesses, which is the delay of the rising edge. Because the rising edge is the load charging through the external pull-up passive resistor, so when the resistance choice hour delay is small, but the power consumption is large, and the delay large power consumption is small. Therefore, if the delay is required, it is recommended to use a falling edge output.

8. add: what is" line and "? :

   On a junction (line), a pull-up resistor is connected to the collector C or drain D of the power supply VCC or VDD and n NPN or nMOS transistors, the emitter e or the source s of these transistors are received on the ground, as long as there is a transistor saturated, this junction (line) is pulled to the ground level. Because these transistors have a base injection current (NPN) or gate Plus high level (NMOS), the transistor is saturated, so the relationship of these bases or gates to this node (line) is either non-nor logic. If the node is followed by an inverter, it is or is logical.

    

With regard to push-pull output and open-drain output, a simple graph is used to summarize:

The left side of the diagram is the push-pull output mode, where the comparator output is high, the following PNP transistor cutoff, and the above NPN transistor conduction, output level vs+; When the comparator output is low, the reverse is true, the PNP transistor is on, the output and the ground are connected to the low level. The right side can be understood as the open-drain output form, need to pull up.

Floating Empty input:

For the float input, has not found the very authoritative explanation, had to understand from the GPIO structure schematic diagram

Since the float input is generally used for external key input, combined with the input circuit on the graph, I understand that the level state of the IO is indeterminate in the floating input state, which is determined entirely by the external input, if the level of reading the port is indeterminate in the case of the pin dangling.

Pull-up input/drop-down input/analog input:

These concepts are well understood and can be easily read literally.

Multiplexed open-Drain output, multiplexed push-pull output:

Can be understood as the configuration when a Gpio port is used as a second function (i.e. not used as a generic IO port)

The final summary of the use of:

Select io mode
in STM32 (1) Float input _in_floating --float input, you can do key recognition, RX1
(2) with pull-up input _ipu--io internal pull-up resistor input
(3) pull-down input _ipd-- io internal pull-down resistor input
(4) Analog input _ain --application ADC analog input, or low power consumption under the Power Saving
(5) Open-drain output _out_od --io output 0 Gnd,io Output 1, floating, external pull-up resistor required to achieve output high level. When the output is 1 o'clock, the status of the IO port is pulled high by the pull-up resistor, but because it is an open-drain output mode, the IO port can be changed from an external circuit to a low level or unchanged. Can read IO input level change, realize C51 io bidirectional function
(6) Push-Pull output _out_pp --io output 0-Gnd, io output 1 -to VCC, read input value is unknown
(7) Push-pull output of multiplexing function _ af_pp --on-chip peripheral function (I²c SCL,SDA)
(8) The open-drain output of the multiplexing function _af_od--on-chip peripheral functions (tx1,mosi,miso. SCK. SS)

STM32 Set instance:

(1) Analog i²c use open-drain output _out_od, connect the pull-up resistor, can correctly output 0 and 1, read the value first gpio_setbits (gpiob, gpio_pin_0 ); pull high, then read the value of IO; use Gpio_readinputdatabit (GPIOB,GPIO_PIN_0);

(2) If there is no pull-up resistor, the IO default is high; you need to read the value of Io, you can use the pull-up input _ IPU and float input _in_floating and open-drain output _out_od;

There are typically 5 ways to use a PIN feature, which is configured as follows:
1) as the normal Gpio input: Configure the PIN as required for , with weak pull-up input or , At the same time do not enable all the reusable function modules that the pin corresponds to.
2) as the normal Gpio output: Configure the PIN as required for or Open drain output , and do not enable all multiplexed function modules that can correspond to this pin.
3) as a normal analog input: Configure the PIN to be analog input mode , and do not enable all the multiplexed function modules that can correspond to that pin.
4) as input to the built-in peripherals: Configure the PIN as required for float input , with weak pull-up input or , At the same time, enable the pin corresponding to a reusable function module.
5) as the output of the built-in peripherals: Configure the PIN as required for or multiplexing open-drain output , while enabling all multiplexed function modules for this PIN.

Note If there are multiple reusable function modules that correspond to the same pin, only one of them can be enabled, and the other modules remain in a non-enabled state.

STM32 Gpio Mode Understanding