Routines :/* Configure one bit for preemption priority */
Nvic_prioritygroupconfig (nvic_prioritygroup_1);
/* Enable the WAKEUP_BUTTON_EXTI_IRQN Interrupt */
Nvic_initstructure.nvic_irqchannel = WAKEUP_BUTTON_EXTI_IRQN;
nvic_initstructure.nvic_irqchannelpreemptionpriority = Preemptionpriorityvalue;
nvic_initstructure.nvic_irqchannelsubpriority = 0;
Nvic_initstructure.nvic_irqchannelcmd = ENABLE;
Nvic_init (&nvic_initstructure);
/* Enable the KEY_BUTTON_EXTI_IRQN Interrupt */
Nvic_initstructure.nvic_irqchannel = KEY_BUTTON_EXTI_IRQN;
nvic_initstructure.nvic_irqchannelpreemptionpriority = 0;
nvic_initstructure.nvic_irqchannelsubpriority = 1;
Nvic_initstructure.nvic_irqchannelcmd = ENABLE;
Nvic_init (&nvic_initstructure);
/* Configure the SysTick Handler priority:preemption priority and subpriority */
Nvic_setpriority (SYSTICK_IRQN, Nvic_encodepriority (nvic_getprioritygrouping (),! Preemptionpriorityvalue, 0));
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NVIC, a Chinese name nested interrupt vector controller, is a unique integrated unit within the CORTEX-M3 family of controllers that is tightly coupled to the CPU, reducing interrupt latency and enabling more efficient processing of subsequent interrupts. For example, such as railway station ticket, those railway station rules and regulations is Nvic, the students and soldiers have higher priority than the average person, they give you a separate window, students and classmates also have a difference, that is you have to line up, That is, your group (steals priority) and your queue number (response priority) determine when you can buy a ticket.
Steals priority, as the name implies, can be interrupted by others is to seize the interruption of others, to achieve the interruption of nesting. The priority of the response can only be queued, can not be grabbed in front of others, that is, cannot be nested.
The register for the specified priority in STM32 is 4 bits, which is defined as follows:
Group No. 0: All 4 bits are used to specify the response priority
Group 1th: Up to 1 bits to specify preemption priority, minimum 3 bits to specify response priority
Group 2nd: Up to 2 bits to specify preemption priority, minimum 2 bits to specify response priority
Group 3rd: Up to 3 bits to specify preemption priority, minimum 1 bits to specify response priority
Group 4th: All 4 bits are used to specify preemption priority
The above definitions are also referred to as interrupt priority groupings, which are defined in detail in the misc.h file of the STM32 firmware library.
The basics understand that the interrupts can be manipulated.
First step: Use the void Nvic_prioritygroupconfig (uint32_t nvic_prioritygroup) function to configure the priority grouping. Nvic_prioritygroup can be configured to
NVIC_PRIORITYGROUP_0 = Select Group No. 0
nvic_prioritygroup_1 = Select Group 1th
nvic_prioritygroup_2 = Select Group 2nd
nvic_prioritygroup_3 = Select Group 3rd
Nvic_prioritygroup_4 = Select Group 4th
For example: Nvic_prioritygroupconfig (NVIC_PRIORITYGROUP_0) is configured as 0 groups.
Second step: Interrupt the initialization of the struct configuration, the struct type is defined as follows:
typedef struct
{
uint8_t Nvic_irqchannel;
uint8_t nvic_irqchannelpreemptionpriority; Steals priority
uint8_t nvic_irqchannelsubpriority; Response Priority
Functionalstate Nvic_irqchannelcmd;
} nvic_inittypedef;
For example: STM32 external interrupt 0 is configured as follows
Exti_nvic_initstructure.nvic_irqchannel = EXTI0_IRQN;
exti_nvic_initstructure.nvic_irqchannelpreemptionpriority = 1; Preemption priority level (0~1)
exti_nvic_initstructure.nvic_irqchannelsubpriority = 7; Response Priority level (0~7)
Exti_nvic_initstructure.nvic_irqchannelcmd = ENABLE;
The third step: interrupt initialization of the struct initialization operation as follows
Nvic_init (&exti_nvic_initstructure);
Fourth Step: Switch Total interrupt operation. In STM32, interrupts are allowed and disabled by changing the CPU priority.
(1) The following two functions are equivalent to closing a total interrupt
void Nvic_setprimask (void);
void Nvic_setfaultmask (void);
(2) The following two functions are equivalent open total interrupts
void Nvic_resetprimask (void);
void Nvic_resetfaultmask (void);
(3) Common operation is the first off and then open interrupt
Nvic_setprimask (); Disable interrupts
Nvic_resetprimask (); Enable interrupts
Two types of functions are to be used in pairs.
The STM32 has 43 channel settable interrupt sources, and the AIRC (application Interrupt and Reset Register) registers have 4 bits for the specified priority. These 4 bits are used to assign preemption priority and sub priority, as defined in the STM32 firmware library
#define NVIC_PRIORITYGROUP_0 ((u32) 0x700)
#define NVIC_PRIORITYGROUP_1 ((u32) 0x600)
#define NVIC_PRIORITYGROUP_2 ((u32) 0x500)
#define NVIC_PRIORITYGROUP_3 ((u32) 0x400)
#define NVIC_PRIORITYGROUP_4 ((u32) 0x300)
The visual comprehension is:
You are God,
The creation of 43 people, so many people to divide the social class and social class;
Because the "class" of the part of the word is more serious, "stratum" more neutral,
So preemption priority-class; Within each class, there are classes, sub-priorities, and classes;
If according to nvic_prioritygroup_4 such points, divided into 16 classes (a class is a preemption priority), 0 classes, high-class people can interrupt the low-class are doing things (nested), up to 1 interrupts and 15 levels of nesting.
Each class (each preemption priority), you designate the 43 people who enter the class; a man named Exti0_irqchannel, you designate him to enter "Class 8", then
Nvic_initstructure.nvic_irqchannel = Exti0_irqchannel;
Nvic_initstructure.nvic_irqchannelpreemptionpriority = 8; Specify preemption priority level 1, preferably 0-15
In addition, within the same class, when a person is doing something, another person cannot interrupt him; (preemption no nesting relationship between interrupt sources with the same priority level)
Also, if they both want to do things at the same time, because there is no hierarchy, then according to the physical order of the vector table, so that the top-ranked people to do;
There are 1 other people spi1_irqchannel, set the following
Nvic_initstructure.nvic_irqchannel = Spi1_irqchannel;
nvic_initstructure.nvic_irqchannelpreemptionpriority = 0; Specify preemption priority level 1, preferably 0-15
Spi1_irqchannel class is high, Exti0_irqchannel can interrupt (nest) when doing things.
If Nvic_prioritygroup_3 is divided into 8 classes (1 classes are 1 preemption priorities), there are 2 classes (sub-priorities) within each class, and high-class people can interrupt low-class people who are doing things (nesting), Up to 1 interrupts and 7 levels of nesting can be completed.
Each class (each preemption priority), you designate the 43 people who enter the class; a man named Exti0_irqchannel, you designate him to enter "Class 3", then:
Nvic_initstructure.nvic_irqchannel = Exti0_irqchannel;
nvic_initstructure.nvic_irqchannelpreemptionpriority = 3; Specify preemption priority level 1, preferably 0-7
It is also necessary to designate his class:
nvic_initstructure.nvic_irqchannelsubpriority = 0; Specify the response priority level 0, preferably 0-1
Another 1 were called Exti9_5_irqchannel, and his class and class were set as follows
Nvic_initstructure.nvic_irqchannel = Exti9_5_irqchannel;
nvic_initstructure.nvic_irqchannelpreemptionpriority = 3; Specify preemption priority level 0, preferably 0-7
nvic_initstructure.nvic_irqchannelsubpriority = 1; Specify the response priority level 1
Then these two men are brothers of the same class, and while one is doing things, another cannot interrupt him; (preemption no nesting relationship between interrupt sources with the same priority level)
If they both want to do things at the same time, because the former class is high, so the former priority.
There is also a man named Usart1_irqchannel, whose class and class are set as follows
Nvic_initstructure.nvic_irqchannel = Usart1_irqchannel;
Nvic_initstructure.nvic_irqchannelpreemptionpriority = 2; Specify preemption priority level 0, preferably 0-7
nvic_initstructure.nvic_irqchannelsubpriority = 1; Specify the response priority level 1
Usart1_irqchannel has the highest priority and can break (nest) when the first two people do things.
The following analogy.
STM32 Nvic Configuration detailed