Stm32 sequence-clock Learning

I. Clock

1. Three different clock sources can be used to drive the system clock (sysclk ):

. HSI oscillator clock high speed internal

. HSE oscillator clock high speed external

. PLL Clock Phase Locked Loop

2. These devices have two secondary clock sources:

. 32 Khz low speed internal RC [1], can be used to drive independent watchdog and RTC. RTC is used to automatically wake up the system from the stopped/standby mode.

. 32.768 kHz low-speed external crystals can also be used to drive RTC (rtcclk ). RTC: Real-time clock real-time clock

When not used, any clock source can be independently started or shut down to optimize system power consumption.

3. you can configure the frequency of AHB (Advanced High Performance Bus), high-speed APB (Advanced Peripheral Bus) (apb2), and low-speed APB (apb1) domains through multiple pre-divider. The maximum frequency of the AHB and apb2 domains is 72 MHz. The maximum allowable frequency of apb1 is 36 MHz.

The RCC provides the external clock of the cortex system timer after dividing the clock by AHB 8. You can select the above clock or the cortex AHB clock as the clock of the systick by setting the systick control and Status Register.

The ADC clock is obtained by dividing the high-speed apb2 clock by 2, 4, 6, or 8.

The timer clock frequency is twice the frequency of its APB bus. However, if the corresponding APB pre-division coefficient is 1, the timer clock frequency is the same as that of the APB bus.

Fclk is a free-running clock (free clock) for the Cortex-M3 ). For more information, see arm Cortex-M3 Technical Reference Manual.

4. Clock Tree

 

Ii. HSE clock

High-speed external clock signal (HSE) is generated by the following two clock sources: (high speed external)

�� HSE external crystal/Ceramic Resonator [2]

�� HSE user external clock

To reduce clock output distortion and reduce startup stability, crystal/Ceramic Resonator and load capacitors must be as close as possible to the oscillator pins. The load capacitance value must be adjusted based on the selected oscillator.

HSE/LSE clock source

Hardware configuration

External clock

Crystal/Ceramic Resonator

External clock source (HSE bypass)

In this mode, an external clock must be provided. It can be up to 25 MHz in frequency. You can select this mode by setting the hsebyp and hseon bits in the clock control register. The external clock signal (a 50% duty cycle square wave, a sine wave, or a triangle wave) must be connected to the soc_in pin while the osc_out pin is suspended. See.

An external crystal/Ceramic Resonator (HSE crystal) 4-16mz external oscillator provides a more accurate master clock for the system. For more information about related hardware configurations, see the electrical characteristics section of the Data Manual.

The hserdy bit in the clock control register rcc_cr is used to indicate whether the high-speed external oscillator is stable. At startup,

The clock is released only when the device is set to hardware 1. If it is activated in the clock interrupt register rcc_cir

Will cause the corresponding interruption.

HSE crystals can be enabled and disabled by setting the hseon bit in rcc_cr in the clock control register.

Iii. HSI clock high speed internal

HSI clock signals are generated by an 8 MHz RC oscillator, which can be directly used as a system clock or

PLL input. The hsi rc oscillator provides a system clock without any external device. It has a shorter start time than the HSE crystal oscillator. However, even after calibration, its clock frequency accuracy remains poor.

Calibration

The manufacturing process determines that the RC oscillator frequencies of different chips are different, which is why the his clock frequencies of each chip have been calibrated to 1% (25 °C) by St before leaving the factory. When the system is reset, the factory calibration value is mounted to the hsical [] bit of the clock control register. If your application is based on different voltages or ambient temperatures, this will affect the accuracy of the RC oscillator. You can adjust the HSI frequency by using the hsitrim [4: 0] bit in the clock control register. The hsirdy bit in the clock control register is used to indicate whether the hsi rc oscillator is stable. During the clock start process, the hsi rc output clock is released only when this bit is set to 1 by hardware. Hsi rc can be enabled and disabled by the hsion bit in the clock control register. If the HSE crystal oscillator fails, the HSI clock will be used as a backup clock source. Refer to the clock security system.

Iv. PLL

The internal PLL can be used to multiply the output clock of the hsi rc or the HSE crystal output clock. Reference and clock control registers.

The PLL settings (select the his oscillator except 2 or HSE oscillator as the input clock of the PLL, and select the multiplier factor) must be in

It is completed before being activated. Once the PLL is activated, these parameters cannot be modified. If the PLL interrupt is allowed in the clock interrupt register, an interrupt request can be generated when the PLL is ready. To use a USB interface in an application, the PLL must be set to output a 48 or MHz clock to provide a 48 MHz usbclk clock.

5. LSE clock

The LSE crystal is a low-speed external crystal or ceramic resonator of 32.768khz. It provides real-time clock or other timing functions

Provides a low-power and accurate clock source. The LSE crystal is enabled and disabled by the lseon bit in the backup domain control register (rcc_bdcr. The lserdy in the backup domain control register (rcc_bdcr) indicates whether the LSE crystal oscillator is stable. In the startup phase, the LSE clock signal is released only after the bit is set to hardware 1. If allowed in the clock interrupt register, an interrupt request can be generated. The external clock source (LSE bypass) must provide an external clock source with a 32.768khz frequency in this mode. You can select this mode by setting the lsebyp and lseon bits in the backup domain control register (rcc_bdcr. An external clock signal with a duty cycle of 50% (square wave, sine wave or triangular wave) must be connected to the osc32_in pin while the osc32_out pin is suspended. See.

Vi. LSI clock

The lsi rc acts as a low-power clock source, which can run in both stopped and standby modes to provide a clock for an independent watchdog and an automatic wake-up unit. The LSI clock frequency is about 32 kHz (between 30 kHz and 60 kHz ). For more information, see the electrical characteristics section in the Data Manual.

Lsi rc can be enabled or disabled by controlling the lsion bit in the/Status Register (rcc_csr.

The lsirdy bit in the control/Status Register (rcc_csr) indicates whether the low-speed internal oscillator is stable. In the startup phase,

The clock will not be released until the bit is set to 1 by hardware. If it is allowed in the clock interrupt register (rcc_cir)

Yes, an application for LSI interruption will be generated.

7. system clock (sysclk) Selection

After the system is reset, the HSI oscillator is selected as the system clock. When the clock source is directly or indirectly used as the system clock through the PLL,

It cannot be stopped. Only when the target clock source is ready (after the delay in the stable phase of startup or the PLL is stable) Will the switching from one clock source to another will happen. When the selected clock source is not ready, the system clock switching will not happen. The switch will not take place until the target clock source is ready. The status bit in the rcc_cr indicates which clock is ready and which is currently used as the system clock.

8. Clock Security System (CSS) (clock system safe)

The clock security system can be activated through software. Once activated, the clock monitor will be enabled after HSE oscillator startup delay and shut down after HSE clock is disabled. If the HSE clock fails, the oscillator is automatically disabled, the clock failure event is sent to the open circuit input of the advanced timer tim1, and the clock security interrupt cssi is generated, allowing the software to complete the rescue operation. This cssi interrupt is connected to the Cortex-M3 NMI interrupt.

Note: Once CSS is activated and the HSE clock fails, CSS interruption occurs and NMI is automatically generated. NMI will be continuously executed until the CSS interrupt hold bit is cleared. Therefore, in the NMI processing program, the CSS interrupt must be cleared by setting the CSSC bit in the clock interrupt register (rcc_cir. If the HSE oscillator is used either directly or indirectly as the system clock (indirectly, it is used as the PLL input clock, and the PLL clock is used as the system clock ), A clock failure will cause the system clock to automatically switch to the HSI oscillator,

At the same time, the external HSE oscillator is disabled. When the clock fails, if the HSE oscillator clock (divided or not divided) is the input clock of the PLL used as the system clock, the PLL will also be disabled.

IX. RTC clock

By setting the rtcsel [1:0] bit in the backup domain control register (rcc_bdcr ),

HSE/128, LSE, or LSI clock are provided. This option cannot be changed unless the backup domain is reset.

The LSE clock is in the backup domain, but the HSE and LSI clock are not. Therefore:

�� If LSE is selected as the RTC clock:

As long as the vbat power supply is maintained, RTC continues to work even though the VDD power supply is cut off.

�� If LSI is selected as an automatic wake-up unit (awu) Clock:

If the power supply of VDD is cut off, awu status cannot be guaranteed

�� If the HSE clock is divided by 128, it is used as the RTC clock:

The RTC status cannot be

Yes.

10. Watch Dog clock

If the independent watchdog has been enabled by hardware options or software, the LSI oscillator will be forced on and cannot be

Disable. After the LSI oscillator is stable, the clock is supplied to iwdg.

11. Clock output

The microcontroller allows the output of clock signals to external MCO pins.

The corresponding gpio port register must be configured as a function. The following four clock signals can be selected as MCO clocks:

�� Sysclk

�� HSI

�� HSE

�� PLL clock in addition to 2

The clock selection is controlled by the MCO [2: 0] bit in the clock configuration register (rcc_cfgr.

[1] RC oscillator circuit, which consists of RC frequency selection network, is suitable for low frequency oscillation and generally used to generate 1Hz ~ 1 MHz low frequency signal. For RC oscillating circuits, increasing the resistance R reduces the oscillation frequency, and increasing the resistance does not require additional costs.

Frequently-used LC oscillating circuits produce a high sine wave frequency. To produce a sine wave with a low frequency, it is necessary to have a large inductance and Capacitor in the oscillating circuit, in this way, not only the components are bulky, bulky, and inconvenient to install, but also the manufacturing is difficult and the cost is high. Therefore, a sine oscillator circuit below kHz generally uses an RC oscillator circuit with a lower oscillation frequency.

Common RC oscillator circuit

There are two types: phase shifting and bridge.

(1) RC Phase-Shifting oscillator has the advantages of simple circuit and economic convenience. However, the frequency selection function is poor, the amplitude is unstable, and the frequency adjustment is inconvenient, therefore, it is generally used in scenarios with fixed frequency and low stability requirements. The oscillation frequency is fo = 1/2 π √ 6rc.

(2) RC Bridge Oscillator combines RC series parallel frequency selection network and amplifier to form an RC oscillating circuit. The amplifier can adopt an integrated operational amplifier.

[2] a resonator is an electronic component that generates a resonant frequency. It is commonly divided into a Z Crystal Resonator and a ceramic resonator. It is stable and has good anti-interference performance. It is widely used in various electronic products. The frequency accuracy of the Z crystal resonator is higher than that of the ceramic resonator, however, the cost is also higher than that of the ceramic resonator. The resonator plays an important role in frequency control. All electronic products require the resonator for frequency transmitting and receiving. The type of the resonator can be divided into two types: Direct insertion and patch.