stm32f4xx Clock Comprehension

Understanding the STM32 clock is the basis for our application timers and more, based on recent work:

Here is the clock tree for STM32:

1. First note is the picture of the green Circle of two, HSE and HSI respectively represents the external clock and internal clock, where HSE is a high-speed external clock, can be connected to the quartz/ceramic resonator, or external clock source,HSE can also be directly as a system clock or PLL input (from Red Circle 4 can be seen), the frequency range is 4mhz~26mhz. STM32 default is 25Mhz, like the atom of the board is 8Mhz, so the transplant must be extra attention.

2. Note that the red Circle 2 represents the part, here is the main PLL multiplier output, used to generate the system required high-speed clock signal, the green Arrow is shown (STM32 also has a secondary phase-locked loop, such as red Circle 3)

The clock source of the main PLL clock is preceded by a divider with a crossover factor of M, and then after the multiplier with the frequency multiplier of N is out, a crossover factor of P (first output PLLP) or Q (the second output PLLQ) is required to divide the divider, Finally, the final primary PLL clock is generated. For example, our external crystal oscillator selection is 8MHz. At the same time we set the corresponding divider m=8, multiplier frequency multiplier coefficient n=336, divider divider factor p=2, then the main PLL generated the first output high-speed clock PLLP:Pll=8mhz * n/(m*p) =8mhz* 336/(8*2) = 168M Hz (Source: Punctual Atom)

3. Distinguishing between APB1 and APB2where red circle 8 represents the location,stm32f4 Many peripheral clock sources, namely two bus bridges: APB1 and APB2, where APB1 is a low-speed bus (up to 42Mhz), The APB2 is a high speed bus (up to 84Mhz). Another timer part, such asthe frequency of the bus (APB1/APB2) is 1, then the frequency is not multiplied, if not 1 (such as 2/4/8/16), then twice times the frequency (fabpx*2), as the timer clock input. to put it simply, as an example of APB1, the system clock is the 168MHZ,APB1 divide factor of 4(system_stm32f4xx.c configuration), then the APB1 speed is 42Mhz, but the timer that is anchored on the bus, due to the crossover factor of 4 instead of 1, So the timer input frequency is 42Mhz x 2 =84 Mhz
here This person speaks very good http://www.cnblogs.com/zyqgold/archive/2013/05/31/tim.html, but the timer frequency is wrong, the specific look reviews, someone has changed him over.

This article is also very good; http://blog.sina.com.cn/s/blog_7142d7da01014zwz.html

stm32f4xx Clock Comprehension