Four weeks Study summary y86-64 instruction set architecture visibility Status: program register, condition code, program status, program counter, and memory
such as the condition code
zf--0 sign, sf--symbol, of--signed
Y86-64 directive
Integer operations directives: ADDQ, SUBQ, ANDQ, Xorq
Jump commands: jmp, Jle, JL, je, jne, Jge, JG
Conditional delivery directives: Cmovle, CMOVL, Cmove, Cmovne, Cmovge, CMOVG
Y86-64 instruction Set
function code for Y86-64 instruction set
Logic design and hardware control language operators in the HCL expression:
and:&&
Or: | |
Non -:!
HCL integer Expression
[select1 : expr1;select2 : expr2;...selectk : exprk;]
Realization of memory and clock seq last week's summary of wrong questions
The following jump commands are related to ZF ()
A.
jmp
B.
Je
C.
Js
D.
Ja
E.
Jb
F.
Jbe
Answer: B D F
Assuming that the function of the C-expression T=a+b is completed with the add instruction, the correct statement about the condition Code Register is ()
A.
If t==0, then zf=1
B.
If t<0, then cf=1
C.
If t<0, then sf=1
D.
if (a<0==b<0) && (t<0! = a<0), the of=1
E.
if (a<0==b<0) && (t<0! = a<0), the cf=1
F.
LEAQ directive does not affect the condition code register
G.
CMP directives do not affect the condition code register
Answer: A C D F
Study summary of the week four