Summary of stm32 (ii) Analysis of cmsis in stm32 Firmware Library

Analysis on cmsis of stm32 Firmware Library 0

[11:26:00 | by: banyai

2011-8-19 edit by: Tony

The v3.3.0 library of stm32 contains the cmsis folder as the software interface standard of arm cortex microcontroller. Now I will make a brief analysis in my actual work: 1. select the boot file: select the correct boot file based on the chip model. This is based on the data manual. For example, choose startup_stm32f10x_md.s for stm32f103vbt6. In this file, you should first define your own heap and stack size, which are determined based on your own needs. The file defines the interrupt vector location and heap and stack initialization operations.

Reset_handler proc

Export reset_handler [Weak]

Import _ main

Import systeminit

LDR r0, = systeminit

Blx R0

LDR r0, =__ main

BX R0

End

The following is an explanation of the previous compilation.

Reset_handler proc // 0x0 reset entry
Export reset_handler [Weak] // export or Global: The program that specifies a label can be called for other files, that is, to declare a global label, the [Weak] Option declares that other names with the same name are referenced first. Declare a globally referenced reset_handler
Import _ main // notify the compiler that the current file must reference the number _ main, but _ main is defined in other source files.
Import systeminit // notify the compiler that the current file references the class systeminit, but systeminit is defined in other source files.

LDR r0, = systeminit //
Blx R0 // The blx command is used to switch the ARM/thumb status and save the transfer instruction of the returned address, and put it back into the address (the blx command points to the next instruction address) to save the link register R14.
LDR r0, =__ main // transmits an immediate number no greater than 232 to the general-purpose register, that is, _ main. The immediate number is equal to the value of = 32-bit immediate number, which is equivalent to mov R0, # _ main
The BX R0 // BX command is used to switch the ARM/thumb status but does not save the transfer instruction of the returned address. R0 is a register containing the absolute address of the target instruction.
End // end

From the above text, we can see that after the system is reset, first execute systeminit () and then enter the main () function. Systeminit () is defined in the system_stm32f10x.c file. Let's talk about it later.

2. stm32f10x. H: This header file contains most definitions of stm32:

A. Define the chip type, for example, # define stm32f10x_md

B. define whether the standard library is included, # define use_stdperiph_driver

C. Define the external oscillator frequency, # define hse_value

We recommend that you define the above three definitions at the beginning in the main. c file, or in the compiler options so that you do not need to modify the file.

D. Define the interrupt number stm32f10x_it.c stm32f10x_it.h.

E. Includes core_cm3.h, system_stm32f10x.h

F. Define data types, such as u8 and S8. to be compatible with the data defined in previous databases, we recommend that you use standard uint8_t types in your program. Bool, flagstatus, alstatus, and errorstatus are also defined.

G. Define the peripheral struct, address, and data constants used.

H. Include stm32f10x_conf.h to configure peripherals

I. Macro defining bit operations

3. system_stm32f10x.h and. C, in these two files:

A. define a global variable uint32_t systemcoreclock: The system clock frequency depends on your choice

B. systeminit (): This function is called in the startup file.

(1) At the beginning of system_stm32f10x.c, select the system clock frequency,

For example, # define sysclk_freq_24mhz 24000000

(2) Use the systeminit () function to output the sysclk = hclk = pclk1 = pclk2 = PLL 24 MHz. Note: This is the condition when HSE is 8 MHz. If HSE is not 8 MHz or HSI is used, the problem may occur.

C. systemcoreclockupdate (): updates the value of systemcoreclock, consistent with the system frequency.

It may be seen that the RCC settings in this file are very limited, so in the program, you can use the function in the standard inventory of stm32f10x_rcc to set.

4. stm32f10x_conf.h

A. Configure the required standard peripheral library and peripherals. You can include the corresponding header files.

B. Define the assert_param mode. When selecting # define use_full_assert, the location of the assert_param problem is useful during debugging. In the official version, comment it out.

5. core_cm3: operations related to the cm3 kernel, the focus is as follows:

A. In the MDK, the total interrupt :__ enable_irq (); the total interrupt :__ disable_irq ();

B. interrupt handling program:

(1) nvic_setprioritygrouping (uint32_t prioritygroup );

Set the interrupt group. The value can only be 0 ~ 7. In stm32, only the first four of the eight digits can be used to set the group. The group can be divided into two parts: preemption priority and subpriority. This value is the beginning of the subpriority. The first bit is the preemptible priority. For example: nvic_setprioritygrouping (5), D7, D6 indicates the preemptible priority (0 ~ 3), D5, D4 indicates the sub-priority (0 ~ 3 ). The smaller the priority value, the higher the priority. An interruption with a higher preemptible priority can interrupt an interruption with a lower preemptible priority. If the preemptible type has the same priority and the sub-priority is different, the sub-priority interrupt is executed first, but the sub-priority interrupt is not interrupted.

It can be understood as a preemptible multi-task.

(2) nvic_enableirq (irqn_type irqn); enableirq

(3) nvic_disableirq (irqn_type irqn); disallow a disableirq

(4) nvic_setpriority (irqn_type irqn, uint32 priority); sets the priority of an interrupt.

(5) nvic_encodepriority (uint32_t prioritygroup, uint32_t preemptpriority, uint32_t subpriority );

(4) and (5) are usually used together. This setting is more intuitive. For example, if you want to set External Interrupt 0 to preemptible priority 0 and sub-priority to 2, then:

Nvic_setpriority (exti0_irqn, nvic_encodepriority (5, 0, 2 ));

Note that the parameters of prioritygroup should be consistent with those set in (1.

In addition to setting the interrupt, you can also use the interrupt setting function in MISC in the standard library.
C. systick_config (uint32_t ticks): sets the system tick clock and enables interruption.

The description of the stm32 kernel is not the same as that of the cm3 kernel. The clock source has two options: AHB/8 and AHB. In this function, hclk (javasick_ctrl_clksource_msk) is selected ), therefore, the scheduled time is ticks/hclk. When the scheduled time is 10 ms and the hclk is 24 MHz, ticks = 10000*24 = 240000.

If you need to select hclk/8, you can directly modify this function, or follow the systick_clksourceconfig (uint32_t systick_clksource) in MISC to set it.

D. nvic_systemreset (): reset the chip.

6. stm32f10x_it interrupt implementation. Write the corresponding interrupt service function here.

7. After Entering the main function, in addition to setting the tick clock and interrupt, you must call:

Rcc_ahbperiphclockcmd (), rcc_apb1periphclockcmd (), rcc_apb2periphclockcmd (), start the corresponding clock, otherwise the peripherals will not work properly.

Here is a brief introduction to Objective C

Nvic nested vector Interrupt Controller nested Vectored Interrupt Controller

System interruption management.
My understanding-manages internal interruptions in the system, and is responsible for opening and disabling interruptions.
Basic Application 1: The initialization function of the interrupt, including setting the position of the interrupt vector table and enabling the required interrupt. All programs are required.
Usage: void nvic_configuration (void)
{
Nvic_inittypedef nvic_initstructure; // restores the default parameters for interrupt management.
# Ifdef vect_tab_ram
// If vect_tab_ram is defined in C/C ++ compiler \ Preprocessor \ defined symbols (see the table for library changes)
Nvic_setvectortable (nvic_vecttab_ram, 0x0); // debug in Ram
# Else // If vect_tab_ram is not defined
Nvic_setvectortable (nvic_vecttab_flash, 0x0); // debug in Flash
# Endif // end judgment statement
// The following is the interrupt enabling process, which is not required by all programs.
// Nvic_prioritygroupconfig (nvic_prioritygroup_2 );
// Sets the priority group of Objective C.
// Note: there are 16 priorities, including preemptible and responsive. The number of the two priorities is determined by the Code. nvic_prioritygroup_x can be 0, 1, 2, 3, 4, the preemptible priority values include 1, 2, 4, 8, 16, and response priority values include 16, 8, 4, 2, and 1. After the number of priority values is specified, all interrupt levels must be selected. If the preemption level is high, other interruptions are interrupted for priority execution, and if the response level is high, other interruptions are executed for priority.
// Nvic_initstructure.nvic_irqchannel = Name of the interrupted channel;
// Open interrupt. The interrupt name can be found in the function library.
// Nvic_initstructure.nvic_irqchannelpreemptionpriority = 0;
// Preemption priority
// Nvic_initstructure.nvic_irqchannelsubpriority = 0;
// Response priority
// Nvic_initstructure.nvic_irqchannelcmd = Enable; // interrupt the channel
// Nvic_init (& nvic_initstructure); // interrupt Initialization
}

Some of them refer to some explanations of the blog garden. As for the article, I do not remember it now.