The "legend" about 32-bit OS's "segment addressing mechanism" with a maximum of 64 TB"

According to a lot of information on the Internet, the maximum virtual address space of 32os can reach 64 TB through the "segment management mechanism". I feel that this conclusion is completely based on the "real mode" approach.
Calculated... Let's talk about how this is calculated:
Offset: 32 bits (4 GB, which is determined based on the size of the byte occupied by the pointer, or determined by eax/EBX/ESP/EBP, etc, (If you do not understand it here, consider mov [eax], 1234 h; yes! Indirect addressing of registers. If the number of 32-bit intel commands exceeds the upper limit, it will be invalid !))
Base Address: 16 bits (here in the "protection mode", it was originally used as a "descriptor Index", but according to the "real mode" understanding, we can do "base address)
According to the above explanation (note this !) : The CPU addressing bus before 386 is 20, so we only shift the 16bits of base address to four places left, exactly as the 20-bit high (meeting the requirements of 20-bit addressing, in fact, if the addressing bus can reach 32 bits, it can completely shift 16 bits left as the high 16 bits, and then offset address as the low 16 bits, meeting the 32-bit addressing mode)
According to the above explanation: base address contains 16 bits, but not all 16 bits are used for base address. Among them, 3bits is used for special purposes: 2bits is used to represent DPL, 1 bit indicates gdt/LDT Selection
Therefore, 13 + 32 = 45 bits (32 TB in total) can have 32 TB for gdt and 32 TB for LDT. Therefore, for each "program" accessible address: the virtual address can be mapped to the global 32 TB, and the exclusive 32 TB
Why is it nonsense:
Http://www.cublog.cn/u2/62361/showart_724744.html

 

Not complete...