Understanding Hot-swappable Technologies: Examples of design processes for hot-swappable protection circuits

High-availability systems, such as servers, network switches, redundant storage disk arrays (RAID), and other forms of communication infrastructure, require close to 0 downtime throughout the lifecycle of their use. If a component of such a system fails or needs to be upgraded, it must be replaced without interrupting the rest of the system, where the faulty board or module is removed while the system is running, and the replacement part is inserted. This process is known as hot swapping (also known as plugging1 when the module interacts with the system software). In order to achieve safe hot plugging, the connector with staggered pins is usually used to ensure that the ground and the power are established prior to other connections, in addition, in order to be able to easily from the live backplane safe removal and insertion of the module, each printed circuit board (PCB) or hot-swappable module with hot-swap controller 2. The controller also provides continuous short-circuit protection and overcurrent protection in a working state.

Although the cut-off or opening of the current will be relatively large, but the high-current design of some of the subtleties are often not fully considered. "Details determine success or failure", this article will focus on the function and importance of the components in the hot-swappable control circuit, and in-depth analysis of design considerations and device selection criteria when using Adi's ADM11773 hot-swappable controllers during the design process.

Hot Swap Technology
The two common system supply voltages are -48 V and +12 V, and they are configured with different hot-swappable protection. The -48 v system includes a low-side hot-swappable controller and on-off MOSFETs, while the +12 v system uses high-end hot-swappable controllers and on-off MOSFETs.

The -48 v solution comes from traditional communication exchange system technologies such as advanced Communication Computing Architecture (ATCA) systems, optical networks, base stations, and blade servers. The power supply is usually provided by the battery pack, which is chosen as the power supply and signal can be transmitted to a far distance without significant loss, and in normal conditions, there is no serious electrical shock hazard due to low levels. The reason for the negative voltage is that when the equipment is inevitably exposed to the humid environment, the metal ions from the anode to the cathode are less corrosive when they are in the extreme grounding condition.

However, in a data communication system, distance is not an important factor, the +12 v voltage is more reasonable, it is often used in servers and network systems. This article focuses on the +12 v system.

Hot Swap Events
Consider a system with a one-v backplane and a set of removable modules. Each module must be removed and replaced without affecting the normal operation of any adjacent module. When there is no controller, each module may cause a large load capacitance to the power cord, usually at a milli-magnitude level. When inserting a module for the first time, its non-rechargeable capacitance requires all available current to charge it. If this inrush current is not limited, this large initial current will reduce the end voltage, causing a significant drop in the voltage on the main backplane, resetting multiple neighboring modules in the system and destroying the module's connectors.

This problem can be solved by the hot-swap controller (Figure 1), the hot-swap controller can control the inrush current reasonably, and ensure the safe power-on interval. After power-on, the hot-swappable controller also continuously monitors the supply current, avoiding short circuits and overcurrent during normal operation.

Figure 1 Hot-swappable Application Block diagram

Hot Swap Controller
The ADM1177 hot-swap controller consists of three main components (Fig. 2): N-channel MOSFET as mains control main switch, sense resistor for measuring current, and hot-swappable controller. The hot-swap controller is used to implement a loop that controls the MOSFET conduction current, which contains a current sense amplifier.

Figure 2, ADM1177 functional block diagram

The current sense amplifier inside the hot-swappable controller is used to monitor the voltage drop on the external sense resistor. This small voltage (usually 0~100 MV) must be amplified to the available level. The gain of the amplifier in the ADM1177 is 10, so, for example, the MV voltage drops generated by a given current is amplified to 1 v. This voltage will be compared with a fixed or variable reference voltage. If a reference source of 1V is used, then a current of up to a voltage of more than MV (±3%) on the sense resistor will cause the comparator to indicate overcurrent. Therefore, the maximum current trigger point depends mainly on the sense resistor, the amplifier gain, and the reference voltage, and the sense resistor value determines the maximum current. The timer circuit is used to set the overcurrent duration.

The ADM1177 has a soft-start function in which the overcurrent reference is linearly increased rather than suddenly switched on, which causes the load current to change in a similar manner. This can be achieved by injecting a current into the external capacitor (ss pin) from the internal current source, resulting in a linear rise in the comparator's reference input from 0 v to 1 v. The external SS capacitance determines the speed of the ascent. If required, the SS pin can also be driven directly using voltage to set the maximum current limit.

An open circuit consisting of a comparator and a reference circuit is used to enable the device. It precisely sets the supply voltage that the Enable controller must achieve. Once the device is enabled, the gate begins to charge, and the gate voltage of the N-channel MOSFET used by this circuit must be higher than the source. In order to achieve this condition across the entire supply voltage (VCC) range, the hot-swap controller integrates a charge pump that maintains the gate Pin's voltage at a level higher than VCC. If necessary, the gate pin requires a charge pump to pull the current to enable the MOSFET, and a pull-down current is required to disable the MOSFET. The weaker pull-down current is used for regulation, and the stronger pull-down current is used to quickly disable the MOSFET in the case of a short circuit.

The last basic module of the hot-swap controller is the timer, which limits the time to adjust the current under overcurrent conditions. The selected MOSFET can withstand a certain amount of power for a specified maximum time. The MOSFET manufacturer uses the chart shown in 3 to mark this range, or the security workspace (SOA).

Figure 3 MOSFET SOA diagram

The SOA diagram shows the relationship between drain source voltage, drain current, and the duration of the MOSFET's ability to withstand this power dissipation. For example, the MOSFET in Figure 3 can withstand 1 ms at a time of ten V and 850 W, and if this condition lasts longer, the MOSFET may be damaged. The timer circuit uses an external timer capacitor to limit the time the MOSFET will withstand these worst-case conditions. For example, if the timer is set to 1ms, when the current lasts longer than the 1 Ms limit, the circuit pauses and the MOSFET is turned off.

In order to provide a safety margin, in ADM1177, the timer's current sense voltage activation threshold is set to MV, so when the detection voltage is close to the rated value of the MV, the hot-swap controller starts timing.

Design examples
Because the design of the controller such as ADM1177 allows for flexibility, it is useful to demonstrate its application in a one-V hot-swappable design example. In this example, assume that:

• Controller for ADM1177
• VIN = V (±10%)
• VMAX = 13.2 V
• Itrip = A
• CLOAD = 2000μf
• VON = Ten V (better power level of the open controller)
• Ipowerup = 1 A (DC bias current required during power-up)

To simplify the discussion, the device tolerance effect is not considered in the calculation. Of course, these tolerances should be considered in the design of the worst-case condition.

On Pin
First consider enabling the controller in case of a supply voltage exceeding ten V. If the on pin has a threshold of 1.3 V, the ratio of the divider from VIN to the on pin should be set to 0.13:1. To ensure accuracy, the electrical leakage of the pin should be taken into account when selecting the resistor.

A voltage divider of 0.130 kω and 1.5 kω is divided into a part-to-pressure ratio.

Selection of the detection resistor
The detection resistor selection should be based on the load current required to turn on the timer.

where vsensetimer = MV.

The maximum power consumed by the sense resistor at a current of

Therefore, the sense resistor should be able to withstand 3W of power. If you do not have a single resistor with the appropriate power rating or resistance, you can use multiple resistors in parallel to form the sense resistor.

Load capacitance charging time
The time required to charge the load capacitor must be determined before selecting the MOSFET. In the power-up phase, the controller usually reaches the current limit due to the inrush current effect of the load capacitance. If the timer pin is not set enough to allow the load capacitor to complete charging, the MOSFET is disabled and the system is unable to power on. We can use the following formula to determine the ideal charging time:

where vregmin = MV, is the minimum regulating voltage of the hot-swap controller.

This equation assumes that the load current is instantaneous from 0 A to a, which is an ideal situation. In fact, the gate charge amount of a larger MOSFET qgs limits the slew rate of the gate voltage, thus limiting the power-up current, so a certain amount of charge is transmitted to the load capacitance without triggering the timer function. In Figure 4, a MOSFET with a larger Qgs causes the timer to work shorter than the MOSFET with a smaller qgs, which is T1 to T3 and the latter is T0 ~ T2.

Figure 4, the impact of Qgs during the start-up process

This is because the increase in the transfer charge between T0 and T1 is less than the current limit, so the actual time is less than the time required for the calculation. This value is difficult to quantify, depending on the gate current of the controller and the gate charge and capacitance of the MOSFET. In some cases, it may account for 30% of the total charge current, so it needs to be considered in the design, especially with large mosfets and large currents.

In the design of a MOSFET with a smaller gate charge, it is assumed that the gate voltage will rise fast. This causes a rapid increase from 0 A to itrip, which causes unwanted transients, in which case the soft start should be used.

Soft start
With soft start, inrush current can be increased from zero linearly to full scale during the setting of the soft reset capacitor. By gradually increasing the reference current, the inrush current can be prevented from suddenly reaching the limit of a. It is important to note that during the soft-start process, the current is in the process of adjustment, so the timer enters the working state from the start of the soft boot, as shown in 5.

Figure 5 The effect of soft start on timers

Therefore, it is recommended to set the soft start time to not exceed the total timer time 10%~20%. For example, you can select a 100μs time. The soft-start capacitance can be determined by:

where ISS = 10μa and VSS = 1 v.

Selection of MOSFETs and timers
The first step for selecting the appropriate MOSFET is to select the VDS and ID criteria. For a V system, the VDS should be either a-V or a-V to handle transients that could damage the MOSFET. The ID of the MOSFET should be greater than the desired maximum value (refer to the SOA diagram in Figure 3). In high-current applications, one of the most important indicators is the MOSFET's on-resistance Rdson. The smaller Rdson ensures that the MOSFET has the lowest power dissipation during normal operation and produces the least amount of heat under full load conditions.

Considerations for heat and power consumption
Because of the need to avoid overheating, the power dissipation of the MOSFET under DC load should be considered before considering the SOA indicator and timer selection. As the MOSFET temperature increases, the rated power will be reduced or reduced. In addition, the service life of the MOSFET is shortened when working at high temperatures.

As mentioned earlier, the hot-swap controller will turn on the timer at the minimum detection voltage of the min mv. For calculation purposes, we need to know the maximum allowable DC current that does not trigger the timer. Assuming that the worst-case scenario is vregmin MV,

Assuming that the MOSFET's maximum RDSON is 2 MΩ, the power is

The thermal resistance of the MOSFET at room temperature is given in the data sheet. The package size and the additional copper lead will have a certain effect on it. Assume

Since the MOSFET consumes 2.1W of power, at worst, the temperature may rise above room temperature 126°c:

One way to reduce this value is to use two or more mosfets in parallel, which effectively reduces the rdson, thus reducing the power dissipation of the MOSFET. When using two MOSFETs, assuming that the current is evenly matched between the devices (allowing a certain tolerance), the maximum temperature rise for each MOSFET is 32°c. The power dissipation of each MOSFET is given in the following formula:

Assuming room temperature Ta = 30°c, plus this temperature rise value, the maximum temperature per MOSFET is 62°c.

MOSFET SOA Considerations
The next step is to check the SOA diagram to select the appropriate MOSFET that works at the worst possible condition. In the worst case scenario, the VDS can be assumed to be equal to VMAX, which is 13.2V, which is the maximum voltage that can be generated on the MOSFET when the MOSFET source is pulled to ground. In the adjustment phase, the worst condition will depend on the maximum value of the hot-swappable controller adjustment point in the data sheet, which is 103 MV. Thus, the current can be calculated according to the following formula:

Before comparing with the MOSFET SOA diagram, we need to consider the temperature derating of the MOSFET, because SOA is based on data at room temperature (TC = 25°c). First calculate the power dissipation at TC = 25°c:

Where RTHJC can be obtained from the MOSFET data sheet.

The same calculation is now done for TC = 62°c:

Therefore, the derating factor of 1.42 can be calculated as follows:

This needs to be applied to the MOSFET SOA diagram in Figure 3. To reflect the adjusted rated power, a diagonal downward translation of the time value representing the maximum power is required. We first use the 1 Ms line to illustrate the principle of this curve. For example, to take a point on this line, such as (A, V), the power of this is three Watts, the derating formula is applied:

At V, the current of the derating power corresponds to a, and on the SOA map This will determine the 1 Ms line after the new 62°c derating. The same approach can be used to determine the new MS and 100μs lines. The new line is shown in red in Figure 6.

Figure 6 SOA diagram with power limit after 62°c derating

Select Timer Capacitor
The new derating line in the SOA can be used to recalculate the timer's parameter values. Draw a horizontal line along the IMAX ≈35a, draw a vertical (light blue line) along the VMAX = 13.2 V, and determine their intersection with the Red line. These intersections show a time between 1 ms and ten MS, perhaps 2 Ms. In a small area of a logarithmic map, it is generally difficult to obtain accurate values, so a careful choice should be taken to take into account the impact of these options on performance and other criteria such as price, ensuring that sufficient tolerances are left.

The time previously mentioned for charging the load is about 850μs. Since the soft start time is determined by the linear ramp, it takes longer to charge the load capacitance than the step change. In order to estimate the total charge amount, if the soft start is used, it is assumed that a half of the soft start time is required on the basis of the calculation time, so that the total time of the soft start time on the 850μs (50μs) is approximately 900μs. If the selected MOSFET has a large gate charge (such as ≥80 NC), this time needs to be further reduced as described earlier. If the load is charged less than the maximum SOA time, the MOSFET is appropriate. In this example, the MOSFET conforms to the standard (0.9 ms<2 ms).

A timer value less than 2 MS is sufficient to protect the MOSFET, and larger than 0.9 MS is sufficient to charge the load. If the selected time is constant at 1 ms, then the capacitance can be calculated by the following formula:

where ITIMER = 60μa and vtimer = 1.3 V,

When using a parallel MOSFET, the calculation of the timer does not change. It is important to design timers and short-circuit protection with a single MOSFET, because in a set of MOSFETs, the vgsth is significantly different, so a single MOSFET is required to handle large currents during the tuning process.

Complete hot-swappable design
Figure 7 shows a parallel MOSFET hot-swappable design with the correct parameter values. The ADM1177 hot-swappable controller also performs other functions. It integrates an on-chip ADC that converts the supply voltage and load current to digital data to be read through the I²C bus and provides a fully integrated current and voltage detection capability.

Figure 7, the complete reference design

Understanding Hot-swappable Technologies: Examples of design processes for hot-swappable protection circuits