Key words
ASR -Auto speech recognition
VAD -Voice activity detection/voice Activities detection
FIFO -First in out/FIFO
Design Import
After the Spring Festival in 2016, Master Zhao provided a design requirement document for intelligent lighting voice control. Master Zhao hopes to develop a voice control lighting brightness of the switch equipment, related information written in the document.
Before the Spring Festival, Master Zhao took a trip to Chongqing. There, a sales manager asked if Master Zhao could design a device that uses voice to control switches and so on. Also, a related product promotion video is provided. I watched the video. It is a system project in which a sound is used as a recognizer to control all electrical equipment in the home. Switch lights, switch air conditioning, switch curtains, adjust the operation of television, can reach the level of application.
Demo Video
When he came back, Master Zhao asked me if I could design a simple product just to control the switching lights, to achieve dimming control and so on. This is the origin of the project.
Pyroelectric Infrared Dimming switch
The following is the original Pyroelectric infrared Remote control switch product physical map, power supply for 36vdc,led lamp board using PWM control, can achieve dimming control. The remote controller can be used to control the LED light plate dimming. Schematic reference for low-end substrates. SchDoc. For physical and backplane photos.
Figure 1 Switch and remote control
Figure 2 Master Controller
Figure 3 LED Light plate
Design evaluation
After the analysis of input information and retrieval on the network, some professional speech recognition chips are initially locked, and the control of professional speech recognition is adopted to meet our product requirements.
Speech Recognition related chips
- LD3320
- A550
- hr8s010
- Https://detail.1688.com/offer/524537441535.html
For existing products on the market today, Discovery LD3320 provides rich and trusted information. In addition, it is also a better product on sale in the market. For the present development, the field of speech recognition is an area I have not been involved in. After many evaluations, I decided to use the LD3320 chip for design at the beginning of the design. At the same time, I can also understand and evaluate speech recognition technology. After the prototype test is stable, we can entrust the speech recognition company to customize the program. This can save the product cost, reduce the price of product sales.
- Using LD3320, the chip is the most popular speech recognition scheme on the market today.
- Use a low-cost MCU to achieve control of the LD3320.
- The disadvantage is that the price of the scheme is currently higher, just LD3320 up to 32 ¥.
Master Controller MCU
The official host controller is STC10L08XE, which uses parallel ports to achieve control of the LD3320. The Waveshare also provides a reference scheme that uses the STM32F103ZET6 master chip. The SPI serial port is used to control the LD3320. For this project, I tend to adopt the STM8S series chip, the use of this chip needs more evaluation.
Stc10l08xe (2.6RMB) http://www.stcmcu.com/datasheet/stc/STC-AD-PDF/STC11F-10Fxx.pdf
- Operating voltage: 2.4-3.6v
- flash:8k
- sram:256
- Serial Port: 1-2
- Timer: 2
Stm32f103zet6 (16.4RMB) the chip is not considered because it is expensive and is not suitable for use in this product.
STM8S003F3P6 (1.7RMB)
timer CAPCOM channels
Device |
Stm8s003k3 |
stm8s003f3 |
Pin count |
+ |
+ |
Maximum number of GPIOs (I/Os) |
|
|
Ext. Interrupt pins |
+ |
+ |
7 |
7 |
Timer complementary outputs |
3 |
2 |
A/D converter channels |
4 |
5 |
High sink I/Os |
|
|
Low density Flash program memory (bytes) |
8 k |
8 k |
RAM (bytes) |
1 k |
1 k |
True data EEPROM (byters |
( |
) |
Peripheral Set |
Multipurpose Timer (TIM1), Spi,i2c,uar T,window wdg,independent WDG,ADC,PWM Timer (TIM2), 8-bit timer (TIM4) |
|
From the specifications of the book, stm8s relative Stl10l08xe has a great advantage, performance and price are more appropriate. The stl10l08xe should be completely substituted for the control of LD3320.
Evaluation results
The design is carried out in two steps, the first step, the sample stage and the small batch design with LD3320. Can quickly provide the finished product to the customer, understand the market feedback. The second step, if the market feedback is good, we can use a dedicated chip design, reduce the volume price.
The sample stage is designed with LD3320
Advantages
- Easy to design, more informative
- Continuous design with independent MCU for easy design adjustment
- Sample can be quickly produced
Disadvantages
Design with special chip in batch
Advantages
- Price is cheap, chip price can be controlled at about 15 yuan
Disadvantages
- Full Control of chip supplier development
- Chips need to be purchased in bulk
Price estimate
- Critical materials and evaluation prices, in bulk (K) units.
Key Items |
Description |
Quantity |
Unit Price (RMB) |
Total Price ($) |
LD3320 |
Speech recognition Chip |
1 |
1 |
32 |
Stm8s003f3 |
MCU |
1 |
1.47 |
1.47 |
PT4115 |
30v,1.2a,led Drive ICS |
1 |
0.61 |
0.61 |
CL6807 |
35v,1a,led Drive ICS |
1 |
0.44 |
0.44 |
Mp2451dt |
36V input switching power supply chip |
1 |
0.98 |
0.98 |
Pcb |
|
1 |
1.2 |
1.2 |
Other |
|
|
|
<10 |
|
|
|
|
|
The price is only a valuation, for reference only, after the bill of materials (BOM) to have a detailed quotation
Hardware Design Implementation
The design realizes two parts, hardware and software. Hardware using Zhao Master's advice, using the original pyroelectric infrared sensor switch shell. The hardware circuit basically refers to the original line and LD3320 reference line. Software section, it should be necessary to prepare some more work. Need to have more knowledge and testing of LD3320.
Hardware block Diagram
A simple block diagram based on existing products and models is initially drawn. This block diagram has the basic functions.
Figure 4 System block diagram
Speech recognition Chip LD3320
Speech recognition chip is the core of the design of the product, and the main function of speech recognition is realized by the chip.
LD3320 is the Irroute company launched a "speech recognition" dedicated chip. The chip integrates the speech recognition processor and some external circuits, including AD, DA Converter, microphone interface, sound output interface and so on. The chip does not need to connect any external auxiliary chips, such as flash, RAM, etc., directly integrated into the existing products that can achieve speech recognition, voice control, man-machine dialogue and other functions. Also, the list of key words identified can be dynamically edited.
The LD3320 interface is available in 2 ways , and I will use a serial port approach, which reduces the number of pins on the MCU and reduces the size of the MCU.
- Parallel port mode (8bit)
- Serial Port Mode SPI
PIN for serial port
- MD-set to High level
- SPIS-Set to Low level
- SCS
- Sdck
- Sdi
- Sdo
Serial Port Usage Precautions:
- LD3320 accepts commands for write (0x04) and read (0x05).
- The falling edge of the SDCK is effective.
- When reading the data, the SDO of the LD3320 chip can change data whenever the rising edge is encountered.
- The SPI interface of the LD chip can accept a maximum sdck clock frequency of 1.5MHz.
- SDO also outputs low levels when not in use (including when SCS is engaged), so if the MCU needs to connect multiple SPI devices, it should be isolated during hardware design.
Figure 5 LD3320 Pin
LD3320 reference schematic diagram
LD3320 Pin Description
Pin |
Name |
IO |
Function |
|
1,32 |
Vddio |
P |
Power input for digital IO circuits |
+ 3.3v |
2 |
Reserved |
|
|
|
3 |
Reserved |
|
|
|
4 |
Reserved |
|
|
|
5 |
Reserved |
|
|
|
6 |
Reserved |
|
|
|
7 |
Vdd |
P |
Power supply for digital logic circuits |
+ 3.3v |
8,33 |
Gndd |
|
Grounding for IO and digital circuits |
GND |
9,10 |
Mic[p,n] |
AI |
Microphone input (positive and negative) |
Mic |
11 |
MONO |
AI |
Mic Input LineIn Input |
|
12 |
Mbs |
|
Microphone bias |
Mic |
13,14 |
LIN[L,R] |
AI |
Stereo LineIn (left and right side) |
|
15,16 |
HPO[L,R] |
AO |
Headphone output (left and right side) |
|
17 |
Gnda |
P |
|
Grounding for analog circuits |
18 |
VREF |
|
Sound signal Reference Voltage |
|
19,23 |
Vdda |
|
Power supply for analog signals |
|
20 |
EQ1 |
AO |
Speaker volume External Control 1 |
|
21st |
EQ2 |
AI |
Speaker Volume External Control 2 |
|
22 |
EQ3 |
AO |
Speaker volume External Control 3 |
|
24 |
Gnda |
P |
|
GND |
25,26 |
SPO[N,P] |
AO |
Speaker output |
|
27,28 |
LOUT[L,R] |
AO |
Lineout output |
|
29 |
Reserved |
|
|
|
30 |
Reserved |
|
|
|
31 |
Class |
I |
Clock input 4-48 (MHz) |
|
34 |
P7 |
/ o |
Parallel port (7th bit) |
|
35 |
P6 |
/ o |
Parallel port (6th bit) |
|
36 |
P5 |
/ o |
Parallel port (5th bit) |
|
37 |
P4 |
/ o |
Parallel port (4th bit) |
|
38 |
P3 |
/ o |
Parallel port (3rd bit) |
|
39 |
P2/sdck |
/ o |
Parallel port (2nd bit)/common SPI clock |
SCK |
40 |
P1/sdo |
/ o |
Parallel port (1th bit)/Common SPI output |
Miso |
41 |
P0/sdi |
/ o |
Parallel port (No. 0 bit)/Common SPI input |
MOSI |
42 |
Wrb/spis |
I |
Write allow (active low), common SPI allows |
Sd_wr |
43 |
Csb/scs |
I |
Parallel mode chip selection signal, common SPI chip selection signal |
Nss |
44 |
A0 |
I |
Address/Data Selection |
|
45 |
Rdb |
I |
Read allow (active low) |
|
46 |
Md |
I |
0: Parallel work/1: Serial work |
|
47 |
RSTB |
I |
Reset signal (Active low) |
Ld_rst |
48 |
INTB |
O |
Interrupt output signal (active low) |
Ld_irq |
MCU
MCU using STM8S003F3 chip, the chip has a variety of external interface (SPI,UART,I2C, etc.), powerful, inexpensive, simple development and so on. is a very high cost-effective chip.
TSSOP20 |
Pin Name |
Type |
Function |
1 |
Pd4/beep/tim2_ch1/uart1_ck |
|
|
2 |
Pd5/ain5/uart1_tx |
/ o |
Uart1_tx |
3 |
Pd6/ain6/uart1_rx |
/ o |
Uart1_rx |
4 |
NRST |
/ o |
Reset |
5 |
Pa1/osciin |
|
|
6 |
Pa2/oscout |
|
|
7 |
Vss |
S |
|
8 |
VCAP |
S |
|
9 |
Vdd |
S |
|
10 |
PA3/TIM2_CH3[SPI_NSS] |
/ o |
Spi_nss |
11 |
Pb5/i2c_sda[tim1_bkin] |
/ o |
I2c_sda |
12 |
Pb4/i2c_scl |
/ o |
I2c_scl |
13 |
PC3/TIM1_CH3[TLI][TIM1_CH1N] |
I |
Ld_irq |
14 |
PC4/CLK_CCO/TIM1_CH4/AIN2/[TIM1_CH2N] |
O |
Ld_rst |
15 |
PC5/SPI_SCK[TIM2_CH1] |
/ o |
Spi_sck |
16 |
PC6/SPI_MOSI[TIM1_CH1] |
/ o |
Spi_mosi |
17 |
PC7/SPI_MISO[TIM1_CH2] |
/ o |
Spi_miso |
18 |
Pd1/swim |
/ o |
SWIM Debug/program |
19 |
PD2/AIN3/[TIM2_CH3] |
AI |
Light AD |
20 |
Pd3/ain4/tim2_ch2/adc_etr |
O |
Pwm |
Power
The power input is powered by a 36V DC. The MCU and the LD3320 power supply is 3.3V. Thus, we need a 3.3V power supply output.
I chose the MP2451 (36v,2mhz,0.6a,step-down CONVERTER) chip, the chip for the 3.3V output circuit diagram reference.
LED Driver
The LED is driven by PWM mode. The driver section refers to the original "driving part of the pyroelectric switch circuit". Originally planned to use CL6807 instead of PT4115, from the specifications of the book, CL6807 voltage of 35v,pt4115 for 30V. The best state is to replace it. However, after careful study of PT4115 's specifications, it was found that its maximum withstand pressure was 45V. The maximum voltage value of the CL6807 is 35V. This has caused me to misunderstand. So, I still use PT4115 to design.
Design and implementation of IR input software
Irroute provides more detailed information. Including specifications, schematics, source code, etc. are provided. As a result, I can easily test the software. If there is a corresponding development version of Icroute. The Waveshare also provides the relevant development boards and materials.
stm8s003 SPI function
SPI_CR1-SPI Control Register 1
- Bit7-lsbfirst:frame format
- 0:MSB is transmitted first
- 1:LSB is transmitted first
- BIT6-SPE:SPI Enable
- 0:peripheral disabled
- 1:peripheral enabled
- Bits 5:3 br[2:0]: Baud Rate control
- 000:fmaster/2
- 001:fmaster/4
- 010:fmaster/8
- 011:fmaster/16
- 100:fmaster/32
- 101:fmaster/64
- 110:fmaster/128
- 111:fmaster/256
- Bit2 Mstr:master Selection
- 0:salave Configuration
- 1:master Configuration
- Bit1 Cpol:clock Polarity
- 0:sck to 0 when idle
- 1:sck to 1 when idle
- Bit0 Cpha:clock Phase
- 0:the First clock transition is first data capture edge
- 1:the Seecond Clock Transition is the first data capture edge
SPI_CR2-SPI Control Register 2
- Bit 7 bdm:bidirectional Data mode enable//bidirectional
- 0:2-line Unidirectional Data Mode selected
- 1:1-line biidirectional Data Mode selected
- Bit 6 Bdoe:input/output Enable in bidirectional modes//In bidirectional mode, I/O enable
This bit selects the direction of transfer in bidirectional mode when the BDM was set to 1.
- 0:input enabled (receive-only mode)
- 1:output Enable (transmit-only mode)
In master mode, the MOSI pin was used and in slave mode, and the miso pin was used.
- Bit 5 crcen:hardware CRC calculation enable
- 0:CRC calculation disabled
- 1:CRC calculation enabled
Note:this bit should be written if SPI is disabled (spe= ' 0 ') for correct operation
- Bit 4 Crcnext:transmit CRC Next
- 0:next transmit value is for Tx Buuffer
- 1:next transmit value is the from Tx CRC register
- Bit 3 Reserved
- Bit 2 rxonly:receive only
- 0:full Duplex (Transmit and Recevie)
- 1:output disapled (Receive only mode)
This bit combined with the BDM bit selects the direction of transfer in 2 line uni-directional mode.
This bit was also useful in a multi-slave system in which this particular slave are not accessed, thsi output from the Acces Sed slave is not corrrupted.
- Bit 1 Ssm:software Slave management
- 0:software Slave Management Disabled
- 1:software Slave Management Enabled
When the SSM bit was set, the NSS pin input is replaced with the value coming from thee SSI bit
- Bit 0 ssi:internal Slave Select
This bit had effect only when the SSM bit is set. The value of this bit is forced onto the NSS pin and the I/O value of the NSS pin is ignored.
- 0:slave mode
- 1:master mode
SPI_ICR-SPI Interrupt Control Register
- Bit 7 Txie:tx Buffer empty interrupt Enable
- 0:txe Interrupt Masked
- 1:txe Interrupt not masked.
- Bit 6 Rxie:rx Buffer not empty interrupt enable
- 0:rxne Interrupt Masked
- 1:rxne Interrupt Not masked
- Bit 5 Errie:error Interrupt Enable
- 0:error Interrupt is masked
- 1:error interrupt is enabled.
- Bit 4 Wkie:wakeup Interrupt Enable
- 0:wakeup Interrupt Masked
- 1:wakeup interrupt enabled.
- Bit 3:0 Reserved
SPI_SR-SPI Status Register
- Bit 7 bsy:busy flag
- 0:spi not Busy
- 1:spi are Busy in communication
- Bit 6 ovr:overrun flag
- 0:no overrun occurred
- 1:overrun occurred
/li>
- Bit 5 modf:mode Fault//mode failure
- 0:no mode fault occurred
- 1:mode fault occurred
- Bit 4 CRCERR:CRC Error flag
- 0:CRC value received matches the SPI_RXCRCR value
- 1:CRC value recevied does not match the SPI_RXCRCR value
- Bit 3 wkup:wakeup flag
- 0:no Wakeup event occurred
- 1:wakeup event occurred
- Bit 2 Reserved
- Bit 1 txe:transmit bufer empty
- tx buffer not empty
- Tx buffer empty
- Bit 0 rxne:receive buffer not empty
- 0:rx buffer empty
- 1:rx buffer not empty
/ul>
SPI_DR-SPI data Register//SPI
- SPI_CRCPR-SPI CRC Polynomial Register
- SPI_RXCRCR-SPI Rx CRC Register
Improving the price of active crystal oscillator is expensive
The price of the active crystal Oscillator (3RMB) was neglected at the beginning of the design, which far exceeded the price of the MCU. Go out and consider such a purpose. It is necessary to optimize the crystal oscillator for consideration.
Reference documents
LD3320 http://www.icroute.com/
Ld3320_board Http://www.waveshare.net/wiki/LD3320_Board
Ld3320_board_ (b) Http://www.waveshare.net/wiki/LD3320_Board_ (b)
Voice switch Design