Analysis of CPU interruption Technology

A while ago, I suddenly became interested in the working principle of computer hardware. Therefore, I read some documents, and I have summarized and understood (and guessed) them. I will give you the following article.

Appendix: This article only analyzes the CPU interruption technology theoretically, but does not analyze the implementation of the interrupt technology.

 

Ready Go

 

Directory

1. What is CPU interruption?

Ii. Functions of CPU interruption

Iii. Types of CPU interruptions

Iv. CPU Interruption Process

5. interrupt handling by multi-core CPU

 

1. What is CPU interruption?

When using a computer, we often encounter such a situation:

1. You are watching a movie

2. Your friend sent a QQ message

3. You reply to your friend's information and continue watching movies.

In this process, everything is so natural. However, in theory, when playing a movie, the CPU is meticulously executing one command after another, how does it maintain the playing of the movie, what about receiving and responding to your keyboard input in time?

 

This means that the CPU interruption technology is working.

CPUInterrupt technology is defined as follows:

1. The computer is running
2. Unusual or unexpected emergency handling incidents in the system
3. The CPU temporarily interrupts the program being executed and forwards it to the corresponding event handler.
4. After the processing is completed, return to the original interrupted location for further execution.

 

Here, "unusual or unexpected events" refer to the information you typed on the keyboard when replying to a friend's QQ. To timely respond to the information you typed, the CPU temporarily interrupts the ongoing task "playing a movie". After processing the information you typed, the task "playing a movie" continues. The execution cycle of the "interrupt current task-> response keyboard input-> continue current task" is very short (generally in microseconds), so most people do not feel it.

For example:

You are reading a book. Suddenly your friend calls, so you put down the book to answer the phone. After the phone is called, you can read the book.

The process of phone call-> put down the book-> answer the phone-> continue reading the book is similar to the process of CPU interruption.

 

Ii. Functions of CPU interruption

Early CPU processing of peripheral events (such as receiving keyboard input) often adopts the "Round Robin" method. That is to say, the CPU repeatedly accesses the peripherals like a scanning job. For example, it first checks whether the keyboard is pressed or not, and then processes it. If not, it continues to see whether the mouse is moving, let's look at the printer ...... In this way, the CPU execution efficiency is very low, and the CPU and peripherals cannot work at the same time (because you have to wait for the CPU to "inspect ").

 

In the interrupt mode, the CPU does not actively access these devices, but only processes its own tasks. If a device needs to contact the CPU or want the CPU to handle some tasks, it will send an interrupt request signal to the CPU. At this time, the CPU will put down the ongoing work to process the requests of this peripheral. After the interrupt is processed, the CPU returns to continue the previous work.

 

 The interrupt mode has the following functions and advantages:

　　1. the CPU and Peripherals can work at the same time, so that the system can respond to external events in a timely manner.

2. Multiple Peripherals can work simultaneously, greatly improving the CPU utilization and data input and output speed.

3. The CPU can handle various hardware and software faults in a timely manner (for example, unexpected situations or some faults occur during computer operation, such as power loss, storage error, and computing overflow. The computer can use the interrupt system to handle it on its own without having to shut down or report to the staff .)

 

Iii. Types of CPU interruptions

In computer systems, interruptions are generally divided into two categories based on different interrupt sources:

1. Hardware interruption

2. software interruption

Hardware interruption

　　Hardware interruption, also known as external interruption, can be divided into two types: Shielded interruption and unshielded interruption.

　　Blocked interruptions:

1. Computer Peripherals or interface functions, such as keyboards, printers, and serial ports

2. This type of interruption can be blocked or ignored by the software when the CPU needs to handle other emergency operations.

 

Unshielded interrupt:

1. Caused by unexpected events, such as power failure and memory verification errors

2. For this type of Interrupt event, it cannot be blocked by software, and the CPU must respond unconditionally.

 

In an x86 processor, the CPU interrupt controller receives external interrupt request signals from two pins (intr and NMI. Where:

1. intr receives blocked interrupt requests

2. NMI receives unshielded interrupt requests

 

Typical examples:

1. A typical case of shielded interruption is printer interruption. The CPU can respond to the printer interruption request quickly or slowly, because it is reasonable to wait for a while for the printer.

2. A typical unshielded interrupt is a power failure. Once a request is interrupted, it must respond immediately and unconditionally. Otherwise, it makes no sense to do anything else.

 

Software interruption

Software interruption, also known as internal interruption, refers to the interruption caused by the call of INTR interrupt commands in a program. For example, in winAPI, The keybd_event and mouse_event functions are used to simulate the input of the keyboard and mouse (this is just my guess ).

 

Iv. CPU Interruption Process

Interrupt request

The interrupt request signal is sent from the interrupt source to the CPU. When an external device sends an interrupt request, the following two conditions must be met:

1. The work of external devices has come to an end. For example, the input device can send an interrupt request to the CPU only after the input data is sent to the data register of the interface circuit (that is, the data to be input is prepared.

2. The system allows the peripheral device to send an interrupt request. If the system does not allow the peripheral to send an interrupt request, the request of the peripheral can be blocked. When the peripheral interrupt request is blocked, the interrupt request cannot be sent even though the peripheral preparation is complete.

　　Interrupt response, processing, and return

　　When the interrupt condition is met, the CPU will respond to the interrupt and transfer it to the interrupt program for processing. The specific process is as follows:

1. Disable the interrupt signal receiver

2. Save the scene (context)

3. Provide the interrupt entry and transfer it to the corresponding interrupt service program.

4. After processing is completed, return and restore the scene (context)

5. Enable the interrupt signal receiver

 

　　Interrupt queuing and interrupt Determination

　　1. the interrupt request is random. Sometimes multiple interrupt sources submit the interrupt request at the same time.

2. the CPU can only respond to one interrupt source request at a time.

3. The CPU does not treat all interrupt requests equally. It will arrange a priority order in advance based on the priorities of the Working nature of each interrupt source. When multiple interrupt sources request interruptions at the same time, they queue in this order of priority, waiting for CPU processing.

 

After learning about the process of CPU interruption processing, it is not difficult to understand the following common scenarios:

When a file is being copied, enter information in a text box. The text box will be suspended for a short time. The data entered by the keyboard cannot be displayed in the text box in time. It takes a while to gradually display the text box.

 

This is because the interrupted operation (entering information into the text box) has a low priority in the interrupt queue, or the CPU considers that the operation being processed (copying files) is too costly, therefore, the current operation will be suspended only when the CPU reaches a low suspension cost point to process the interruption information.

 

5. interrupt handling by multi-core CPU

The Interrupt Processing of multi-core CPUs is very different from that of single-core CPUs. The core of a multi-core processor needs to communicate with each other through interruption. Therefore, the CPU chip has both the local Interrupt Controller of each processor core and the Global interrupt controller responsible for arbitration of Interrupt allocation between each core.

 

Currently, APIC (Advanced Programmable Interrupt Controllers) is primarily used for Interrupt Processing and Interrupt control. It is an Advanced programming Interrupt controller. It is a distributed architecture based on two basic functional units: local units and I/O units. In a multi-core system, multiple local and I/O APIC units can operate on each other as a whole through the APIC bus.

 

APICFunctions:

1. Receives internal or external I/O APIC interruptions from the processor interrupt pin and sends these interruptions to the processor core for processing.

2. receive and send core interrupt messages in a multi-core processor system

 

For an interrupt request sent by an external device, the Global interrupt controller receives the request and determines which core is sent to the CPU for processing. You can also program APIC to enable a fixed CPU to process all the interruptions.

 

The End

This article is the author with extreme caution (fart !) Attitude and focus (let's talk about it !) It takes seven, seven, forty-nine days to launch the program. (You can die ~)

I also hope that you will embrace the ignorance and ignorance of the cainiao. Do not hesitate to correct errors and omissions! Thank you!

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