Deployment of MQX RTOs based on NXP Vybrid ARM processors

1). Introduction

MQX is a real-time operating system provided by NXP, with the following diagram showing the kernel, file system and protocol stack, as well as good support for NXP's arm processor, which can be easily developed and deployed.

This article demonstrates compiling and deploying MQX applications based on the Toradex Colibri VF61 (NXP VF61 SoC) Arm computer module paired with the Colibri Eva Board Development Board. The VF61 is a heterogeneous dual-core architecture arm processor that includes a cortex-a5 and a cortex-m4, typically with a A5 core running a Linux or wince system as a control and interface display, and the M4 core runs a real-time operating system to handle real-time tasks. This article demonstrates the deployment of an MQX application on top of the M4 core.

2). Prepare

a). Hardware preparation

./Colibri VF61 computer module and Colibri EVA Board Development Board

./Ubuntu Linux Development host

b). Software preparation

./VF61 Module A5 core run Toradex Embedded Linux release V2.5 Beta3

./Ubuntu Linux Development host

./MQX RTOs 4.1.2 Vybrid-Download from here

./Linaro Bare-metal toolchain for cortex-r/m, 4.8 2014-q1 Update- download from here

3). Configure

a). Unzip to the "/home/username" directory

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$ tar xzf "~/mqx RTOS 4.1.2 for Vybrid Linux Base.gz.gz"

$ tar xjf ~/gcc-arm-none-eabi-4_8-2014q1-20140314-linux.tar.bz2

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b). Configuring MQX

./File "Fslmqxos_4_1_2_vybrid/build/common/make/global.mak"

Setting up cross-compilation toolchain

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+ Toolchain_rootdir =/home/yourname/gcc-arm-none-eabi-4_8-2014q3/

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./File "Fslmqxos_4_1_2_vybrid/config/twrvf65gs10_m4/user_config.h"

Because VF61 A5 and M4 share peripheral resources, the M4 peripherals are modified by modifying the A5 Device tree to ensure that the additional setting is not already occupied by A5. This article only tests the M4 call Gpio later, thus removing other and A5 conflicting peripheral resources, The actual application can be configured according to the specific situation.

------------------------

...

#define BSPCFG_ENABLE_I2C0 0

#define BSPCFG_ENABLE_II2C0 0

...

#define BSPCFG_ENABLE_SPI0 0

...

#define BSPCFG_ENABLE_RTCDEV 0

...

#define BSPCFG_ENABLE_ESDHC 0

#define BSPCFG_ENABLE_SAI 0

...

#define BSPCFG_ENABLE_TTYB 0

#define BSPCFG_ENABLE_ITTYB 0

#define BSPCFG_ENABLE_TTYC 1

#define BSPCFG_ENABLE_ITTYC 0

...

------------------------

./File "Fslmqxos_4_1_2_vybrid/mqx/source/bsp/twrvf65gs10_m4/twrvf65gs10_m4.h"

Modify Clock

------------------------

...

#define Bsp_core_clock (166700000)

#define Bsp_bus_clock (166700000)

#define Bsp_system_clock (83300000)

#define Bsp_ipg_clock (83300000)

...

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4). Compiling MQX

a). Replace the "mqx/examples/hello/build/make/hello_twrvf65gs10_m4/build_gcc_arm.sh" file

from Download the file here

b). Compile HelloWorld Firmware

------------------------

$ CD mqx/examples/hello/build/make/hello_twrvf65gs10_m4/

$./build_gcc_arm.sh

...

Build Done

Press any key to continue ...

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c). Create a binary firmware file

------------------------

$ CD ~/fslmqxos_4_1_2_vybrid/mqx/examples/hello/build/make/hello_twrvf65gs10_m4/gcc_arm/ram_release

$ export path=~/gcc-arm-none-eabi-4_9-2014q1/bin/: $PATH

$ arm-none-eabi-objcopy-o Binary hello_twrvf65gs10_m4.elf Hello_twrvf65gs10_m4.bin

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d). View App Entry Address

Because the binaries do not indicate the header information of the loading address or the ingress address, they need to be added manually when loading

------------------------

$ arm-none-eabi-objdump-f hello_twrvf65gs10_m4.elf

Hello_twrvf65gs10_m4.elf:file format Elf32-littlearm

Architecture:arm, Flags 0x00000112:

Exec_p, has_syms, d_paged

Start Address 0x3f0007b1

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e). Run MQX

Copy the bin file to the Colibri VF61 A5 Core Linux system, run the following command to start the MCC and then download and run MQX in the M4 core

------------------------

# modprobe MCC

# mqxboot Hello_twrvf65gs10_m4.bin 0x3f000000 0x3f0007b1

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f). View M4 serial output

Connecting the Colibri Development Board UARTB interface to the development host

------------------------

$ sudo minicom-d/dev/ttyusb1-d 115200

Welcome to minicom 2.7

options:i18n

Compiled on Jan 1 2014, 17:13:19.

PORT/DEV/TTYUSB1, 14:58:22

Press Ctrl-a Z for help on special keys

Hello World

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5). GPIO Demo

Run Mqx GPIO demo in M4 and control open and close bsp_led1 via Bsp_button1

a). View M4 corresponding PIN definition

Determine bsp_button1 corresponding Gpio pin for ptb16,bsp_led1 corresponding to Gpio pin PTB0

------------------------

$ VI fslmqxos_4_1_2_vybrid/mqx/source/bsp/twrvf65gs10_m4/twrvf65gs10_m4.h

...

#define BSP_LED1 (LWGPIO_PIN_PTB0)

...

#define BSP_SW1 (LWGPIO_PIN_PTB16)

...

#define Bsp_button1 BSP_SW1

...

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b). Confirm M4 Gpio PIN Resource

By querying the Colibri VF61 manual and the A5 Linux Device tree file, it was found that PTB0 was occupied by A5 Linux pwm0, while PTB16 was flexcan1 occupied but by default and enabled, so first you need to recompile the A5 as described here. The Linux Device tree file will pwm0 disable to prevent a PIN resource conflict, then connect PTB0 (SODIMM 59) to X21 LED1 (Pin 2) on the Colibri board and PTB16 (SODIMM 63) to X21 SW6 ( Pin 11)

c). Same method for compiling MQX GPIO Firmware

------------------------

$ CD ~/FSLMQXOS_4_1_2_VYBRID/MQX/EXAMPLES/GPIO/BUILD/MAKE/GPIO_TWRVF65GS10_M4

$./build_gcc_arm.sh

$ CD gcc_arm/ram_release/

$ export path=~/gcc-arm-none-eabi-4_9-2014q1/bin/: $PATH

$ arm-none-eabi-objcopy-o Binary gpio_twrvf65gs10_m4.elf Gpio_twrvf65gs10_m4.bin

$ arm-none-eabi-objdump-f gpio_twrvf65gs10_m4.elf

Gpio_twrvf65gs10_m4.elf:file format Elf32-littlearm

Architecture:arm, Flags 0x00000112:

Exec_p, has_syms, d_paged

Start Address 0x3f000e51

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d). Deploy and test the demo

./Deploy and run MQX Gpio to M4 on VF61 A5 Linux

------------------------

# mqxboot Gpio_twrvf65gs10_m4.bin 0x3f000000 0x3f000e51

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./In the M4 serial output Print button 3 times

------------------------

====================== GPIO Example ======================

The (SW1) button is a configured to trigger GPIO interrupt.

Press the (SW1) button 3x to continue.

------------------------

./Press Colibri Development Board SW6 3 times, you can control LED1 by SW6

------------------------

Button pressed 3x

The (SW1) button is now polled.

Press the (SW1) button to switch LEDs on or off

Button pressed

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6). MCC Pingpong Demo

The following is an MCC Pinpong demo to test the transfer of information between A5 and M4

a). Configuring the MCC version

MQX 4.1. Version 2 defaults to the MCC V2 version, but also provides the V1 version source code; Since the current VF61 Linux only supports the MCC V1 version, first replace the V1 version with the V2 version source code

------------------------

$ CD ~/fslmqxos_4_1_2_vybrid/mcc/source

$ unzip mcc_version_1_2.zip-d.  /. Follow the prompts to select Replace All

$ VI mcc_vf600.c

Modify the red part as below

static const unsigned int mcc_cpu_to_cpu_vectors[] = {gic_cpu_to_cpu_int0, nvic_cpu_to_cpu_int0};

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b). Compiling MCC

------------------------

$ CD ~/FSLMQXOS_4_1_2_VYBRID/MCC//BUILD/MAKE/MCC_TWRVF65GS10_M4

$./build_gcc_arm.sh

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c). Compile Pingpong Demo

------------------------

$ CD ~/FSLMQXOS_4_1_2_VYBRID/MCC/EXAMPLES/PINGPONG/BUILD/MAKE/PINGPONG_EXAMPLE_TWRVF65GS10_M4

$./build_gcc_arm.sh

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d). Deploy Run Test Pingpong demo

Get bin and Ingress addresses the same way as before, and run through A5 Linux to M4

./A5 Linux Deployment Execute pingpong Demo

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$ mqxboot pingpong_example_twrvf65gs10_m4.bin 0x3f000000 0x3f001095

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./after operation, M4 serial output

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Responder task started, MCC version is 001.002

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./Then run your own pingpong application in A5 Linux

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Mcc-pingpong

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./Then M4 serial output

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Responder Task received a MSG

message:size=4, DATA = 1

Responder Task received a MSG

message:size=4, DATA = 3

...

------------------------

./same A5 serial output

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version:001.002

message:size=4, DATA = 2 after 0.004325 seconds.

message:size=4, DATA = 4 after 0.004340 seconds.

message:size=4, DATA = 6 after 0.004669 seconds.

...

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7). Summary

This article shows a brief demonstration of running MQX and the A5 and M4 core communication routines on top of the VF61 M4 core, and it is visible that MQX can be conveniently deployed on NXP processors, and detailed MQX application development can refer to the following documentation.

Fslmqxos_4_1_2_vybrid/doc http://developer.toradex.com/knowledge-base/mqx-on-the-cortex-m4-of-a-colibri-vf61